Green Hills Software's MULTI IDE Available For MIPS Technologies' MIPS64 5Kc and 20Kc Cores.Business Editors/High-Tech Writers Embedded Systems Conference 2000, Booth No. 636 Green Hills First To Offer C/C C/C Center to Center C/C Combustion Chamber C/C Command/Control C/C Crew Chief C/C cabin cruiser (US DoD) C/C chief complaint (medical) C/C Channel-to-Channel C/C Communication and Collaboration ++ Optimizing Compiler For New MIPS (Million Instructions Per Second) The execution speed of a computer. For example, .5 MIPS is 500,000 instructions per second; 100 MIPS is a hundred million instructions per second. 64(TM) Cores SAN JOSE, Calif.--(BUSINESS WIRE)--Sept. 26, 2000 Green Hills Software today announced the availability of the MULTI MULTI Multiple 2000 Integrated Development Environment See IDE. integrated development environment - interactive development environment and the industry's first optimizing C/C++ compilers for MIPS Technologies' (Nasdaq:MIPS, MIPSB) MIPS64 architecture and 5Kc(TM) and 20Kc(TM) 64-bit cores. The MULTI IDE, together with Green Hills' compilers, greatly simplify the development of sophisticated programs for embedded systems based on MIPS64 processors. MULTI also includes a MIPS64 instruction set simulator An Instruction Set Simulator (ISS) is a simulation model, usually, but by no means always, coded in a high-level language, which mimics the behavior of a mainframe or microprocessor by "reading" instructions and maintaining internal variables which represent the processor's , which makes it possible to develop and test MIPS64 code prior to the customer receiving test chips. Green Hills will demonstrate the new simulator at ESC See escape character and escape key. See also ESC/P. ESC - escape . "The MIPS64 architecture sets a new standard for high-performance embedded computing in digital electronics products that are on the cutting-edge of innovation," said John Carbone, vice president of marketing at Green Hills. "Our optimizing compilers make it easy for developers of sophisticated embedded applications to develop, fast, compact code that takes full advantage of the high performance features of the 5Kc core, and the superscalar A CPU architecture that allows more than one instruction to be executed in one clock cycle. See pipeline processing. (architecture) superscalar - A superscalar architecture is a uniprocessor that can execute two or more scalar operations in parallel. , high-speed floating point capabilities of the 20Kc core, the R20K processor, and other MIPS64 processors." "Efficient development tools and compilers are the key to maximizing programmer productivity and reaping the full performance benefits of the MIPS64 architecture," said Brian Knowles, vice president of marketing for MIPS Technologies Inc. "We're happy to have Green Hills Software on board with their new tools for the powerful MIPS64 architecture." The MIPS64 20Kc is the highest performance licensable 64-bit RISC processor core available, optimized for digital entertainment and networking applications. Featuring an integrated SIMD (Single Instruction stream Multiple Data stream) A computer that performs one operation on multiple sets of data. It is typically used to add or multiply eight or more sets of numbers at the same time for multimedia encoding and rendering as well as scientific floating point unit with MIPS-3D extensions, the dual-issue, superscalar processor can execute two integer, or one integer and one floating point instruction every clock cycle. This gives it a peak performance of 1500 MIPS and 3.0 GFLOPS See gigaFLOPS. GFLOPS - gigaflops at 750 MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. . The 20Kc features a seven-stage pipeline with instruction prefetch and dynamic branch prediction, an integrated MMU (Memory Management Unit) The part of the computer that governs memory access. Either part of the CPU chip or housed on separate chips, the MMU controls memory partitions and virtual memory. See memory and virtual memory. MMU - Memory Management Unit , and 32 kbytes each of 4-way set-associative instruction and data cache. The core consumes just 2.6 mW/MHz when fabricated in a 0.15-micron CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes. process. The MIPS64 5Kc is a high-performance, synthesizeable 64-bit RISC processor core optimized for low-power, battery-operated, system-on-a-chip and ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. applications. Featuring a peak clock frequency of 310 MHz (0.13 micron process), the 5Kc core consumes just 0.5 mW/MHz. The 5Kc features a six-stage pipeline with branch control and single-cycle execution for most instructions, a co-processor interface, a 64-entry MMU, and up to 64 kbytes each of 4-way set-associative cache. The MULTI 2000 IDE, together with Green Hills' family of optimizing C, C++, EC++, and Ada95 compilers, automates all aspects of embedded software development for MIPS64 processors, including the 5Kc and 20Kc architectures. Available for Windows 95/98, Windows NT, and Unix host platforms, the MULTI IDE features a window-oriented editor, source-level debugger, graphical program builder, run-time error checker, version control system, performance profiler, optimizing profiler (CodeBalance(TM)), and real-time RTOS (1) (RealTime Operating System) An operating system designed for use in a real time computer system. See real time system, embedded system, process control and OS-9. EventAnalyzer. MULTI also features an instruction set simulator (SimMIPS) that allows programmers to develop and test MIPS64 code on a PC or workstation without the need for the target hardware. The heart of the MULTI environment is a source-level debugger that supports process- and system-level debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits. . The debugger provides a separate window for each process, supports mixed assembly and high-level language formats, includes a language-sensitive expression evaluator, and provides special support for C++ (such as a Class Browser, object display and template debug capability). The MULTI 2000 debugger is fully RTOS aware, which enables designers to debug and tune their applications at a task level. With the MULTI debugger, designers working with popular RTOSs can start and stop threads, and monitor OS resources like buffers, queues, and semaphores. MULTI 2000's EventAnalyzer builds on the debugger's real-time capabilities, graphically displaying system and application events on an expandable timeline in real time. Operating like a high-level logic analyzer, the EventAnalyzer GUI (Graphical User Interface) A graphics-based user interface that incorporates movable windows, icons and a mouse. The ability to resize application windows and change style and size of fonts are the significant advantages of a GUI vs. a character-based interface. displays all context switches, RTOS API calls, and interrupts in a time-relative manner using intuitive icons. The EventAnalyzer also provides versatile navigation capabilities that allow programmers to zoom in and out of the timeline to obtain greater detail about particular event sequences. The MULTI 2000 IDE features the industry's most advanced MIPS C/C++ optimizing compiler. The scaleable C/C++ compiler lets programmers use switch options to select any subset of C++ they want, from bare bones C, to full-blown ANSI/ISO C++. The compiler also supports Embedded C++ (EC++), a dialect of C++ optimized for resource-constrained embedded applications that achieves the efficiency of C while preserving many of the best object-oriented features of C++. The MULTI IDE for MIPS64 cores, including a C/C++ compiler, assembler, linker, and instruction set simulator, costs $5900 (single-seat developer's license) for the Windows version and $8900 for the Unix version. More on Green Hills Software Inc. Incorporated in 1982, Green Hills Software Inc., is a leading supplier of royalty-free real-time operating systems and software development tools for 32- and 64-bit embedded systems. Green Hills' royalty-free ThreadX(R) and INTEGRITY(TM) real-time operating systems, fully integrated with its market leading compilers and MULTI(R) integrated development environment, provide a total development and run-time solution that addresses both deeply embedded and high-reliability applications. Green Hills Software is headquartered in Santa Barbara, Calif., with international headquarters in the United Kingdom. For more information on Green Hills Software products, please call 805/965-6044 or email inquiries to sales@ghs.com. http://www.ghs.com. Green Hills Software, and MULTI are registered trademarks and INTEGRITY is a trademark of Green Hills Software Inc. Other trademarks are trademarks (registered or otherwise) of the respective trademark owners. |
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