Galileo Technology Unveils GalNet-II Advanced Datacommunications Switching Architecture.SAN JOSE San Jose, city, United States San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850. , Calif.--(BUSINESS WIRE)--July 13, 1998-- New Chipset A group of chips designed to work as a unit to perform a function. For example, a modem chipset contains all the primary circuits for transmitting and receiving. A PC chipset provides the electronic interfaces between all subsystems (see PC chipset for illustration). Architecture Provides Gigabit Switching Below the Cost of Fast Ethernet An earlier name for 100Mbps Ethernet. See 100Base-T. (networking) Fast Ethernet - A version of Ethernet developed in the 1990s(?) which can carry 100 Mbps compared with standard Ethernet's 10 Mbps. It requires upgraded network cards and hubs. Galileo Galileo (Galileo Galilei) (găl'ĭlē`ō; gälēlĕ`ō gälēlĕ`ē), 1564–1642, great Italian astronomer, mathematician, and physicist. Technology revealed today details about the GalNet-II(TM) Advanced Datacommunications Switching Architecture, Galileo's first major new switching architecture since the introduction of the original GalNet Architecture in 1996. The GalNet-II Architecture Family incorporates a scalable switching fabric capable of switching traffic from a variety of communications technologies Noun 1. communications technology - the activity of designing and constructing and maintaining communication systems engineering, technology - the practical application of science to commerce or industry including Fast Ethernet, Gigabit Ethernet An Ethernet standard that transmits at 1 Gbps. Used mostly to connect high-end workstations and servers as well as for network backbones, Gigabit Ethernet transmits full duplex from point to point using switches and half duplex in a shared environment (CSMA/CD) using a hub. , Frame Relay A high-speed packet switching protocol used in wide area networks (WANs). Providing a granular service of up to DS3 speed (45 Mbps), it has become popular for LAN to LAN connections across remote distances, and services are offered by most major carriers. , ATM and xDSL Refers to DSL technologies in general, including ADSL, HDSL, SDSL and VDSL. See DSL. xDSL - Digital Subscriber Line . The first semiconductor products in the GalNet-II Family were also announced today (see separate press release). "The introduction of the GalNet-II Architecture represents a major milestone for Galileo Technology," said Avigdor Willenz, Galileo's chairman and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. . "With GalNet-II we have developed an architecture capable of switching and routing datacommunications traffic at gigabit speeds today, while defining a migration path capable of taking us well into the future." Key Features of the GalNet-II Architecture The GalNet-II Architecture incorporates a variety of new technologies developed to meet the needs of Galileo's customers: -0-
-- Frame-in-Cell(TM) hybrid crossbar switching that supports a total
bandwidth of approximately 12 gigabits/second with a single chip
today; scalable to hundreds of gigabits/second.
-- Support for transmitting data over twisted pair cable at more
than 2 Gbps per second using a PHY layer device that is less than
one-tenth the cost of Gigabit Ethernet.
-- Gigabit speed switching at under $30 per port.
-- Hot stacking and hot swapping capability.
-- Support for Fast Ethernet and standard Gigabit Ethernet
switching.
-- Future support for ATM, xDSL and Frame Relay switching.
"When we started development of the GalNet-II architecture we set
several important goals," stated Mr. Willenz. "First, the architecture
needed to be very high performance right from the start. Second, the
architecture needed to be scalable in terms of price, performance and
features. And finally, the architecture had to be cost effective. We
have achieved all of these goals with GalNet-II."
Scalable Distributed Switching Architecture
The GalNet-II Architecture incorporates two basic silicon
building blocks: switch controllers and hybrid cell crossbars. The
switch controllers make switching/routing decisions in a distributed
manner; each controller has the ability to learn the topology of the
network automatically and decide to which destination device and port
a packet should be routed.
Packets destined for ports on a different switch controller are
forwarded into the switch fabric as GalNet-II messages and then
relayed automatically to the destination. In addition, the switch
controllers communicate topology and status information between each
other through the switch fabric.
"Switching architectures that use a single central switching
engine do not scale well as the number of ports are increased,"
commented David Shemla, Galileo's vice president of product
definition.
"Using a distributed switching architecture allows the GalNet-II
family to maintain very high performance as more ports are added. In
effect, you are adding processors as the number of switching tasks
increase."
The distributed architecture of GalNet-II also makes it easier to
mix protocols such as Ethernet and Frame Relay. The complexities of
each protocol are handled by the switch processors; all the switch
fabric sees are simple cell-based messages.
The first GalNet-II Architecture chips, also announced today,
include:
-- GT-48310 8-Port 10/100 Ethernet Switch Controller with Advanced
Management
-- GT-48311 8-Port 10/100 Ethernet Switch Controller with Standard
Management
-- GT-48312 8-Port 10/100 Unmanaged Ethernet Switch Controller
-- GT-48320 Single Port 10/100/1000 Gigabit Ethernet Switch
Controller
-- GT-48300 4-Port G.Link Crossbar
-- GT-48302 8-Port G.Link Crossbar
With these devices it is possible to build switches ranging from
8 to 256 ports of Fast Ethernet, or up to 32 ports of Gigabit
Ethernet. A typical application is shown in Figure 1 below (or see
http://www.galileoT.com/news/gnet2.html).
Figure 1: Typical GalNet-II System Implementation
(See website for graphic, http://www.galileoT.com/news/gnet2.html)
Innovative New Switching Architecture
The GalNet-II Architecture uses an innovative new switching
architecture dubbed hybrid cell crossbar. This approach marries the
performance of pure crossbar architectures with the cost effectiveness
of shared bus architectures. The use of "Frame-in-Cell Technology(TM)"
allows packets from multiple sources to efficiently timeshare a single
link without large packets blocking shorter ones.
To achieve this, GalNet-II devices segment frames into cells
before transmitting them into the switch fabric. The architecture
allows cells from multiple ports to be interleaved and independently
prioritized based on class-of-service.
This capability allows for the prioritizing of traffic based on
the needs of the application; multimedia applications can receive
maximum throughput, while e-mails can be treated as low priority.
GalNet-II devices use a new high-speed point-to-point bus known
as G.Link. The G.Link bus, as implemented in the first GalNet-II
devices, provides a dedicated 2.4 Gbps link between any two GalNet-II
devices. G.Link can be used to connect two switch controllers directly
(in an unmanaged Fast Ethernet switch, for example), or it can be used
to connect a switch controller to a G.Link crossbar device.
G.Link also offers several other unique features:
-- The ability to provide gigabit speed stacking over inexpensive
copper cables.
-- Support for hot swapping when used as a backplane interconnect.
-- Support for remote switch management, whereby an entire stack of
switches can be managed from a single intelligent box.
"We defined G.Link to be a very scalable `fat pipe' for moving data and messages in the GalNet-II Architecture," said Mr. Shemla. "Today, G.Link is implemented either as a 32-bit 75MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. point-to-point bus, or as an eight differential-pair LVDS (Low Voltage Differential Signaling) A transmission method for sending digital information. LVDS sends data over data high and data low lines rather than data and ground. bus. We are currently developing 3.2Gbps/100MHz versions and plan on scaling the technology as network bandwidth demands require." Cooperation with National Semiconductor and 3M on LVDS G.Link Stacking Bus Galileo has worked with both 3M Corporation and National Semiconductor on the development of certain portions of the G.Link bus. National Semiconductor's ChannelLink(TM) LVDS technology is used as the physical layer for converting the 32-bit G.Link native bus to 8 differential pairs Differential pair is a pair of conductors with special characteristics, used for differential signaling. Examples of the differential pair include:
Once converted to LVDS, G.Link can be run up to 5 meters over off-the-shelf copper cabling. Galileo worked with 3M to select their LVDS twinaxial cable as the standard medium for G.Link. This standard cable -- used primarily for flat panel displays A thin display screen for computer and TV usage. The first flat panels appeared on laptop computers in the mid-1980s, and the LCD technology became the standard. Stand-alone LCD screens became available for desktop computers in the mid-1990s and exceeded sales of CRTs for the first time -- combines the high-performance and reliability required for switching applications with the low cost structure dictated dic·tate v. dic·tat·ed, dic·tat·ing, dic·tates v.tr. 1. To say or read aloud to be recorded or written by another: dictate a letter. 2. a. by the PC industry. Gigabit Switching at a Cost Below Fast Ethernet One of the main applications for Gigabit Ethernet today is in the switching of traffic between "stacked Stacked is an American television sitcom that premiered on Fox on April 13, 2005. On May 18, 2006, Stacked was cancelled, leaving five episodes unaired in the United States. The last episode aired on January 11, 2006. " Fast Ethernet switch boxes. In this application, packets enter a port on a Fast Ethernet switch and are forwarded via Gigabit Ethernet to a "top-of-stack" Gigabit switch. The Gigabit switch then forwards the traffic back to the destination Fast Ethernet switch. Three switching tasks are performed to switch Fast Ethernet data between boxes. The GalNet-II Architecture, by comparison, can provide the same connectivity described above without the unnecessary conversion to Gigabit Ethernet. Fast Ethernet packets destined des·tine tr.v. des·tined, des·tin·ing, des·tines 1. To determine beforehand; preordain: a foolish scheme destined to fail; a film destined to become a classic. 2. for a different switch in the stack are forwarded over G.Link, not Gigabit Ethernet. Two switching tasks are eliminated as the destination port is determined at packet reception time. In addition, G.Link is less than one-tenth the cost of Gigabit Ethernet. "Using an inexpensive copper cable to achieve gigabit speed switching and stacking is a huge advantage for the GalNet-II Architecture" commented Mr. Willenz. "We can provide gigabit connectivity and aggregation at a price point today that standard Gigabit Ethernet may never achieve." The total cost of implementing a G.Link LVDS connection at 2.4 Gbps is approximately $30 for a 3 meter run (including the cable, ChannelLink PHYs, and connectors.) Compare this to the cost of Gigabit Ethernet at approximately $300-$400 for the MAC, PHY See physical layer and physical. , lasers and fiber. The GT-48300 G.Link Crossbar can also be used stand-alone as a very inexpensive gigabit speed switch. A four port gigabit crossbar switching An earlier telephone switch. First used in the late 1930s, it was a mechanical device that used magnets and metal bars (crossbars) to close connections. Crossbar switches have been replaced with electronic switches (large-scale, specialized computer systems). See ESS and DMS. box could be built with just a single GT-48300 and any combination of LVDS PHY ports and/or GT-48320 based Gigabit Ethernet ports. "This is not a G.Link versus Gigabit Ethernet story, however," continued Mr. Willenz. "In fact, with the GalNet-II Architecture our customers can offer switch ports that support both G.Link LVDS and Gigabit Ethernet. "If the customer only needs to stack, then the inexpensive and higher performance choice is G.Link. If a connection to a Gigabit Ethernet server or backbone is needed then Gigabit Ethernet -- via the GT-48320 device -- is the right solution." GalNet-II Device Availability Galileo is now in production with four members of the GalNet-II Architecture Family. The GT- 48300 is a four port G.Link crossbar with a PCI-based management interface. The GT-4831X devices (GT-48310, GT-48311, and GT-48312) are all 8-Port Fast Ethernet Switch Controllers each representing a different level of cost and features. The GT-48320 Gigabit Ethernet Switch controller and GT-48302 8-Port G.Link Crossbar will sample in the third quarter of 1998. More About the Technology For more detailed technical information, please see the GalNet-II Technology Backgrounder back·ground·er n. An informal news briefing for reporters by an official often speaking off the record. Noun 1. backgrounder available on our website at http://www.galileoT.com. About Galileo Technology Galileo Technology, a market leader in complex data communications data communications, application of telecommunications technology to the problem of transmitting data, especially to, from, or between computers. In popular usage, it is said that data communications make it possible for one computer to "talk" with another. systems on silicon, is one of the semiconductor industry's fastest growing suppliers of complex, high-performance, integrated circuit integrated circuit (IC), electronic circuit built on a semiconductor substrate, usually one of single-crystal silicon. The circuit, often called a chip, is packaged in a hermetically sealed case or a nonhermetic plastic capsule, with leads extending from it for devices. Galileo's products include single-chip Ethernet switches A device that connects clients and servers to each other in an Ethernet network. See switched Ethernet. , high-performance system controllers for RISC processors RISC processor [Reduced Instruction Set Computer], computer arithmetic-logic unit that uses a minimal instruction set, emphasizing the instructions used most often and optimizing them for the fastest possible execution. and WAN coprocessors. Galileo's products form the heart of many advanced data communications systems built by leading OEMs, such as Cisco Systems “Cisco” redirects here. For other uses, see Cisco (disambiguation). Cisco System,Inc. (NASDAQ: CSCO, HKSE: 4333 ) is an American multinational corporation with 54,000 employees and annual revenue of US $28.48 billion as of 2006. , Hewlett Packard, Bay Networks, D-Link, NBase Communications and Intel. Galileo employs more than 130 people worldwide with business headquarters in San Jose, California San Jose (IPA: /ˌsænhoʊˈzeɪ/) is the third-largest city in California, and the tenth-largest in the United States. It is the county seat of Santa Clara County. and R&D headquarters in Manof, Israel. For more information on Galileo, call 888/GALTEK-1 or visit our website at http://www.galileoT.com.
CONTACT: Galileo Technology, Inc.
Christine Morana, 408/367-1400
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