Functional Qualification Verification Startup Certess Selects Verific as HDL Component Software Provider.Verific Tools Serve as Certitude cer·ti·tude n. 1. The state of being certain; complete assurance; confidence. 2. Sureness of occurrence or result; inevitability. 3. Front End ALAMEDA, Calif. -- Following the recent launch of Certitude[TM], Certess[TM] Inc. announced today that it has selected Verific Design Automation's hardware description level (HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. ) Component Software to serve as the front end for this new functional qualification tool. Certitude is the first commercial functional qualification software. It provides verification engineers with the ability to determine whether system on chip (SoC) or intellectual property (IP) block design errors can go undetected and offers objective evaluation of the quality of the functional verification Functional verification, in electronic design automation, is the task of verifying that the logic design conforms to specification. In everyday terms, functional verification attempts to answer the question "Does this proposed design do what is intended?" This is a complex task, . Integrated as Certitude's register transfer level (RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; ) front end, Verific's HDL Component Software includes SystemVerilog- and VHDL-based parsers and elaborators. Certess has access to Verific's comprehensive online support and maintenance. "Certitude has already been implemented by 50 design teams worldwide and many have given us high marks for our HDL capabilities," says Michel Courtoy, chief executive officer of Certess. "We credit Verific for quality products and highly professional support and service, making it a vendor we've enjoyed as a business partner." "Certess' innovative technology is sure to bring functional qualification relief to a large number of verification engineers," remarks Michiel Ligthart, Verific's chief operating officer Chief Operating Officer (COO) The officer of a firm responsible for day-to-day management, usually the president or an executive vice-president. . "We're delighted to be part of a something that's improving design and verification quality." Verific will demonstrate its HDL Component Software in Booth #3464 during the 44th Design Automation Conference (DAC See D/A converter and discretionary access control. DAC - Digital to Analog Converter ) June 4-8 at the San Diego Convention Center The San Diego Convention Center is the main convention center for the city of San Diego, California. It is located in the Marina district of downtown San Diego near the Gaslamp Quarter, at 111 West Harbor Drive. in San Diego San Diego (săn dēā`gō), city (1990 pop. 1,110,549), seat of San Diego co., S Calif., on San Diego Bay; inc. 1850. San Diego includes the unincorporated communities of La Jolla and Spring Valley. Coronado is across the bay. , Calif. To schedule a demonstration, visit Verific's website located at: http://www.verific.com. Or, contact Rick Carlson, Verific's vice president of sales. He can be reached at (970) 946-1755 or via email at rick@verific.com. About Verific Design Automation Verific Design Automation was founded in 1999 by electronic design automation (EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. ) industry veteran Rob Dekker. It develops and sells C++ source code-based SystemVerilog, Verilog and VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. front ends -- parsers, analyzers and elaborators -- as well as a generic hierarchical netlist database for EDA applications. Verific's technology has been licensed in many applications, combined shipping more than 45,000 end-user copies. Corporate headquarters is located at: 1516 Oak Street, Suite 115, Alameda, Calif. 94501. Telephone: (510) 522-1555. Facsimile number: (510) 522-1553. Email: info@verific.com. Website: http://www.verific.com. About Certess Certess, Inc. is the only electronic design automation company providing functional qualification products for companies that create and integrate complex design blocks or intellectual property (IP). The company's technology provides design and verification engineers with an objective way to evaluate and improve the completeness of the verification environment, resulting in a shorter and more predictable process to integrate SoC designs and ensure high quality designs. The company is headquartered in Campbell, Calif. For additional information, see www.certess.com. Certess and Certitude are trademarks of Certess, Inc. Certess and Verific Design Automation acknowledge trademarks or registered trademarks of other organizations for their respective products and services. |
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