Full Day, Hands-On Bluespec Tutorial Collocated with DAC.Introduction to Bluespec SystemVerilog on Saturday June 7, 2008WALTHAM, Mass. -- Bluespec Inc.: WHAT: A full day tutorial entitled: "Hands-on Introduction to BSV BSV Bundesschuldenverwaltung BSV Banana Streak Virus BSV BASIC Bsave Graphics (File Name Extension) BSV Binocular Single Vision BSV Beach Support Vehicle BSV Bundesschüler-Innenvertretung BSV Best State Vector BSV Basic Graphics File (Bluespec SystemVerilog)" WHEN: Saturday, June 7, 2008 from 9:00A to 5:00P PDT WHERE: The tutorial will be given at MEMOCODE MEMOCODE Conference on Formal Methods and Programming Models for Codesign '08, which is being held at the Anaheim Convention Center Anaheim Convention Center is a major convention center in Anaheim, California. It is located across from the Disneyland Resort on Katella Avenue. Much of the Anaheim Convention Center has been renovated in recent years with state-of-the-art facilities. in room 303B, in Anaheim, CA. MEMOCODE is collocated with DAC See D/A converter and discretionary access control. DAC - Digital to Analog Converter . WHO: The tutorial will be presented by Arvind and Rishiyur Nikhil, with support from several MIT MIT - Massachusetts Institute of Technology students. Arvind is the Johnson Professor of Computer Science and Engineering, Massachusetts Institute of Technology Massachusetts Institute of Technology, at Cambridge; coeducational; chartered 1861, opened 1865 in Boston, moved 1916. It has long been recognized as an outstanding technological institute and its Sloan School of Management has notable programs in business, (MIT), co-originator (along with James Hoe) of the synthesis technology underlying BSV, and a co-founder of Bluespec, Inc. Rishiyur Nikhil is the CTO and a co-founder of Bluespec, Inc. Several MIT students who are Bluespec experts will also be present to assist participants with the lab work. Tutorial Details: In this tutorial participants will get a solid technical introduction to BSV and learn how it improves many aspects of modern SoC development: modeling, early software development, architecture exploration, design, verification, and long-term evolution and maintenance. The lectures will be organized around a few serious examples and will examine and analyze excerpts of their actual source code. The tutorial is also hands-on for those who bring their laptops and wish to work with the tools. Tutorial and MEMOCODE conference registration and details can be found on the conference website at http://svl1.cs.pdx.edu/memocode08/. For those interested in attending just the tutorial, the cost ranges from $50 to $125 depending on affiliation. BSV is a modern, fully synthesizable design language in which all behavior is expressed with Guarded Atomic Actions (rewrite rules, concurrent atomic transactions). Rules can systematically be composed from fragments across module boundaries using atomic transactional interfaces. In addition, BSV has powerful abstraction mechanisms such as expressive and polymorphic types with overloading and strong static type-checking, full orthogonality (all types are first-class), and Turing-complete static elaboration. Thus, BSV is scalable to large, industrial-strength System-on-Chips (SoCs) even while designs remain highly parameterized and succinct. Contact George Harper, Bluespec's vice president of marketing, for more details. He can be reached at (781) 250-2200 or via email at george.harper@bluespec.com. About Bluespec Bluespec Inc. manufactures an industry standards-based Electronic Design Automation (EDA) toolset that significantly raises the level of abstraction The level of complexity by which a system is viewed. The higher the level, the less detail. The lower the level, the more detail. The highest level of abstraction is the single system itself. for hardware design while retaining the ability to automatically synthesize high-quality RTL, without compromising speed, power or area. Elevating System-on-Chip (SoC) modeling, verification and implementation with atomic transactions, the only high-level abstraction for hardware concurrency Operations that are performed simultaneously within the computer. For example, dual-core CPUs provide complete overlapping of two independent processes. See dual core, hyperthreading, multiprocessing, multitasking, multithreading, SMP and MPP. concurrency - multitasking , the general purpose toolset allows ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. and FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. teams to reduce development time, bugs and re-spins that contribute to product delays and escalating costs. More information can be found on www.bluespec.com or by calling (781) 250-2200. Copyright 2008 Bluespec Inc. Bluespec and AzureIP are trademarks of Bluespec Inc. All other brands, products or service names may be trademarks or service marks of the companies with which they are associated. |
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