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Fujitsu and Philips Unveil Static Component Interconnection Test Technology for SDRAMs.


SAN JOSE, Calif.--(BUSINESS WIRE)--Nov. 10, 1998--In a collaboration initiated in 1997, Fujitsu and Philips have jointly developed a Design-for-Test methodology to facilitate assembly interconnection testing of "complex" memory devices.

Complex memories require an initialization in·i·tial·ize  
tr.v. in·i·tial·ized, in·i·tial·iz·ing, in·i·tial·iz·es Computer Science
1. To set (a starting value of a variable).

2. To prepare (a computer or a printer) for use; boot.

3.
 sequence or are accessed by a more complex protocol, and therefore complicate assembly test. Examples are Synchronous Dynamic Random Access Memory (storage) Synchronous Dynamic Random Access Memory - (SDRAM, Synchronous DRAM) A form of DRAM which adds a separate clock signal to the control signals. SDRAM chips can contain more complex state machines, allowing them to support "burst" access modes that clock out a series of  (SDRAM (Synchronous DRAM) A type of dynamic RAM (DRAM) memory chip that has been widely used since the late 1990s. SDRAM chips eliminated wait states by dividing the chip into two cell blocks and interleaving data between them. ), Double Data Rate DRAM (DRDRAM (Direct Rambus DRAM) See RDRAM. ) and Flash.

With the trend towards smaller pin pitch and chip scale packages (CSP (1) (Certified Systems Professional) An earlier award for successful completion of an ICCP examination in systems development. See ICCP.

(2) (Commerce Service P
) for memories, testing of solder connections becomes ever more complicated and expensive. The new test technology enables the user to detect all static solder connection faults (open, short, stuck@0, stuck@1) by using simple low cost testers. Diagnosis is significantly improved while test time and therefore manufacturing time can be dramatically reduced, resulting in lower production cost.

Called Static Component Interconnection Test Technology (SCITT SCITT School Centred Initial Teacher Training ), the concept is compatible with boundary-scan, the recognized standard for manufacturing defect testing, formulated by the international Joint Test Action Group (JTAG (Joint Test Action Group) An IEEE standard for boundary scan technology. See scan technology.

JTAG - Joint Test Action Group
) and standardized as IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields.  Std. 1149.1.

Unlike other approaches such as boundary-scan, the new SCITT test technology enables memory interconnect testing to be undertaken with almost zero die size penalty, no change in device package and footprint, and no performance degradation impact at virtually no extra cost.

SCITT is based on a simple loop-back function incorporated in the I/O area of the memory device. The use of XNOR (eXclusive NOR) See NOR.  combinations makes it possible to run a single pass of walking-0 and walking-1 tests to detect all static connection faults. Philips estimates that this concept will reduce test time from seconds to milliseconds. The generic nature of this test technology makes it easily applicable for all memory densities and device organizations.

The concept has been proposed to the JEDEC The division of the Electronic Industries Alliance (EIA) that deals with semiconductor standards (officially, the JEDEC Solid State Technology Association of EIA). JEDEC was formed in 1958 when the Joint Electron Tube Engineering Council (JETEC) split into two Joint Electron Device  committee and presented at the International Test Conference in Washington D.C. where memory users/suppliers as well as test equipment manufacturers showed interest in the concept. Industry-wide standardization is in consideration.

The first device supporting SCITT is Fujitsu's 64Mbit (2Mx32) SDRAM which will be available at the beginning of 1999.

"This innovative technology has the potential to revolutionize on-board memory testing and is expected to be instrumental in keeping down manufacturing costs; so important in a very competitive market where PC and other consumer equipment prices are continually falling," said Geoff Peppiette, executive director marketing Europe for Fujitsu.

"The close collaboration with Philips Centre for Manufacturing Technology and Philips Research Laboratory involving application, test and design experts has been particularly satisfying," said Steffen Hellmold, DRAM product marketing engineer and SCITT project manager at Fujitsu.

"Now that the functionality of the technology has been validated and the systems simulation successfully completed, we are confident that together with Fujitsu we will be able to drive this new test technology to become a recognized industry standard," said Engel Roza, director IC design of Philips Research Laboratory at Eindhoven in the Netherlands.

Fujitsu Limited is a leading provider of information technology products and solutions for the global marketplace. Founded in Japan in 1935 as a telephone equipment maker, the Fujitsu Group had consolidated revenues of $37.7 billion in the fiscal year ended March 31, 1998.

With over 500 group companies, including Amdahl and ICL (International Computers Ltd., London) The former name of Fujitsu Services, the European-centered arm of the global Fujitsu Group and one of the leading IT services companies in Europe, the Middle East and Africa. , Fujitsu is one of the world's largest suppliers of computers and information systems solutions, telecommunications and semiconductor products, software and services. The Fujitsu Group has 180,000 employees worldwide and operations in more than 100 countries. Home page: http://www.fujitsu.co.jp/index-e.html
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Copyright 1998, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Geographic Code:9JAPA
Date:Nov 11, 1998
Words:580
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