Fujitsu Develops Technology for Low-Power, High-Performance 45nm Logic Chips.Tokyo, Japan, June 18, 2007 - (JCN JCN Japan Corporate News JCN Journal of Cognitive Neuroscience JCN Journal of Cardiovascular Nursing JCN Journal of Christian Nursing JCN Job Control Number JCN Journal of Child Neurology JCN joint communications network (US DoD) Newswire) - Fujitsu Limited and Fujitsu Laboratories Ltd. today announced their development of a platform technology for 45 nanometer (45nm) generation LSI LSI: see integrated circuit. (Large Scale Integration) Between 3,000 and 100,000 transistors on a chip. See SSI, MSI, VLSI and ULSI. logic chips, which combines technologies for low power consumption and high-performance interconnect. Compared to previous 45nm technologies on record, the new platform reduces the leakage current that occurs when current is wasted in wait states to one-fifth that of previous levels and reduces interconnect-induced lag times by approximately 14%. The realization of these new 45nm generation platform technologies will enable Fujitsu to offer its customers LSI logic chips that feature even higher speeds, smaller size and lower power consumption than currently available. Details of the new technology were presented at the 2007 Symposium on VLSI Technology. The need to achieve higher levels of integration in LSI logic chips is becoming greater, spurred by the higher level of performance needed to support the proliferation of functions in various devices, and the need for multiple processor cores on devices. In light of these trends, for 45nm generation logic technology, in accordance with higher integration levels and enhancements in performance speeds, technologies able to suppress power consumption of devices are becoming increasingly important. In order to heighten integration levels of LSIs, with each new generation of devices, there is a need to shorten the gate length of each transistor and make the spaces between interconnects narrower. In addition, to achieve high speeds there is a need to minimize the time lag from interconnects between the hundreds of millions of individual transistors within the LSI chip. When a the gate length of a transistor is shortened, a problem that exists is increased power consumption attributable to increased leakage current between the transistor's source and drain when no signal voltage is applied at the gate - for example, when a mobile phone is on standby mode awaiting calls and no operation processing is underway. For the 45nm generation, both the width of interconnects and the spaces between interconnects, are at the smallest 65nm. In addition to an increase of interconnect resistance due to miniaturization min·i·a·tur·ize tr.v. min·i·a·tur·ized, min·i·a·tur·iz·ing, min·i·a·tur·iz·es To plan or make on a greatly reduced scale. min , if the insulating layer's dielectric constant stays the same as the previous generation, interconnect capacitance will increase, thereby resulting in increased interconnect lag and thus necessitating a material with lower dielectric constant. Fujitsu's New Technology 1. New annealing annealing (ənēl`ĭng), process in which glass, metals, and other materials are treated to render them less brittle and more workable. technology Fujitsu researchers found that forming shallower source and drain regions is an effective way to reduce leakage current. However, simply making them shallower also increases resistance at the source and drain regions, thereby degrading transistor performance. To counteract this, Fujitsu researchers developed a new annealing technology called millisecond annealing (MSA (Metropolitan Service Area) An urban area with at least 50,000 people plus surrounding counties. There are 306 MSAs and 428 RSAs (rural service areas) in the U.S. MSAs and RSAs are used to allocate cellular licenses. ). Compared to previous annealing, Fujitsu's millisecond annealing technology uses higher temperatures thus enabling reduction of resistance, and because the annealing time is brief it possible to form shallow sources and drain regions and thereby reduce leakage current. 2. High-performance interconnects Fujitsu researchers used nano-clustering silica (NCS), which has a dielectric constant (k) of 2.25 - the lowest of any insulating film reported to date - in a lower interconnect region suitable for the smallest interconnect spaces. NCS is an insulating material pocked pock n. 1. A pustule caused by smallpox or a similar eruptive disease. 2. A mark or scar left in the skin by such a pustule; a pockmark. tr.v. with miniscule holes, enabling both a low dielectric value and high mechanical strength simultaneously. Fujitsu introduced NCS on a partial basis beginning with the 65nm generation. However, for the 45nm generation, the company is using NCS not just within a given interconnect layer but also between different layers to further reduce interconnect capacitance. Results The new annealing technique is highly effective in limiting transistor resistance, reducing leakage current to one-fifth that of previous levels, thereby enabling advantages such as extending mobile phone maximum standby (wait) time up to five-fold. In addition, by utilizing high-performance interconnect technology Fujitsu was able to achieve a 14% reduction in interconnect lag time in comparison to standard 45nm generation interconnect technologies in the International Technology Roadmap for Semiconductors The International Technology Roadmap for Semiconductors is a set of documents produced by a group of semiconductor industry experts. These experts are representative of the sponsoring organisations which include the Semiconductor Industry Associations of the US, Europe, Japan, [1]. Future Developments These two newly developed technologies enable the reduction of leakage current during standby, while simultaneously increasing operating speed. Fujitsu is targeting 2008 to incorporate these technologies into LSIs that are suited for mobile devices as part of a ubiquitous networking society. Notes [1] International Technology Roadmap for Semiconductors (ITRS ITRS International Technology Roadmap for Semiconductors ITRS International Terrestrial Reference System ITRS International Transaction Reporting System (EU) ITRS International Technical Rescue Symposium ): Known as ITRS, this roadmap for semiconductors is sponsored by five leading semiconductor manufacturing regions in the world: Japan, the United States, Europe, Korea, and Taiwan. The sponsoring organizations are the Japan Electronics and Information Technology Industries Association The Japan Electronics and Information Technology Industries Association (社団法人電子情報産業協会 (JEITA JEITA Japan Electronics and Information Technology Industries Association (merger of JEIDA and EIAJ) ), the United States Semiconductor Industry Association (SIA Sia (sī`ə) or Siaha (sī`əhə), in the Bible, family returned from the Exile. SIA - Serial Interface Adaptor ), the European Semiconductor Industry Association (ESIA ESIA Environmental and Social Impact Assessment ESIA Environmental and Social Impact Analysis ), the Korean Semiconductor Industry Association (KSIA KSIA Korea Semiconductor Industry Association KSIA Korean Semiconductor Industry Association ), and the Taiwan Semiconductor Industry Association (TSIA (messaging) TSIA - Title Says It All. Something to put in the body of a electronic mail message or bulletin board posting when no body is really necessary because the title or subject header contains the whole message. ). For more information: http://www.itrs.net/about.html For more information, Please visit http://jp.fujitsu.com/group/labs/en/ About Fujitsu Ltd Fujitsu Limited (TSE See Tokyo Stock Exchange. TSE 1. See Tokyo Stock Exchange (TSE). 2. See Toronto Stock Exchange (TSE). : 6702; ADR ADR - Astra Digital Radio : FJTSY) is a leading provider of customer-focused IT and communications solutions for the global marketplace. Pace-setting device technologies, highly reliable computing and communications products, and a worldwide corps of systems and services experts uniquely position Fujitsu to deliver comprehensive solutions that open up infinite possibilities for its customers' success. Headquartered in Tokyo, Fujitsu reported consolidated revenues of about 4.8 trillion yen (US$40.6 billion) for the fiscal year ended March 31, 2006. For more information, please visit www.fujitsu.com. About Fujitsu Laboratories Ltd. Founded in 1968 as a wholly owned subsidiary Wholly Owned Subsidiary A subsidiary whose parent company owns 100% of its common stock. Notes: In other words, the parent company owns the company outright and there are no minority owners. of Fujitsu Limited, Fujitsu Laboratories Limited is one of the premier research centers in the world. With a global network of laboratories in Japan, China, the United States and Europe, the organization conducts a wide range of basic and applied research in the areas of Multimedia, Personal Systems, Networks, Peripherals, Advanced Materials and Electronic Devices. For more information, please see: http://jp.fujitsu.com/labs/en/ Source: Fujitsu Ltd Contact: Press Contacts Fujitsu Limited Public and Investor Relations https://www-s.fujitsu.com/global/news/contacts/inquiries/index.html Technical Contacts Fujitsu Laboratories Ltd. Silicon Technologies Development Lab. Tel: +81-42-532-1253 E-mail:silicon-ask@ml.labs.fujitsu.com Japan Corporate News Network. All rights reserved. |
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