First Silicon Solutions (FS2) Announces Support for Cadence Incisive(R) ESL Verification Products.Interoperability Accelerates System-level Hardware Debug and HW/SW HW/SW Hardware/Software Co-verification Solution for SoC Development PORTLAND, Ore. -- First Silicon Solutions, (FS2), a division of MIPS Technologies, Inc. (NASDAQ NASDAQ in full National Association of Securities Dealers Automated Quotations U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on : MIPS (Million Instructions Per Second) The execution speed of a computer. For example, .5 MIPS is 500,000 instructions per second; 100 MIPS is a hundred million instructions per second. ) and a leader in on-chip instrumentation IP for high performance debug solutions, has announced support and interoperability with the new Incisive([R]) Electronic System Level (ESL (1) An earlier family of client/server development tools for Windows and OS/2 from Ardent Software (formerly VMARK). It was originally developed by Easel Corporation, which was acquired by VMARK. ) products from Cadence. The Incisive ESL solution addresses emulation, prototyping and silicon simulation applications to system-level verification. FS2 provides processor and systems level on-chip instrumentation, probes, and software to facilitate SoC functional controllability and observability at both the processor IP and system level interfaces. FS2 augments the Incisive capabilities by providing customers easier-to-use and more powerful hardware and software co-verification solutions to simplify and link functional and performance analysis between EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. and hardware-based debug tools. FS2 IP and probe solutions developed as part of the Cadence HW/SW co-verification ecosystem have been optimized to support cross probing, debug and analysis for system-level platform verification with Incisive Palladium([R]) and Xtreme([R]) series and Incisive Enterprise Simulators. This allows customers better, faster, and simpler interfaces between embedded hardware designs being verified and their supporting embedded software environments. "System Debug continues to be an increasingly important aspect in the verification flow, both at the platform prototyping and silicon production level. Tightly integrating tools for hardware and software verification with EDA capabilities and flows via on-chip instrumentation is critical for today's increasingly complex designs," said Rick Leatherman, vice president and general manager of FS2. "We are pleased to be working with Cadence in creating these vital connections between hardware instrumentation and software-based verification flows." One key innovation that will be supported in current releases of all FS2 tools is support for adaptive test clocks (RTCK) and low speed clocked for JTAG (Joint Test Action Group) An IEEE standard for boundary scan technology. See scan technology. JTAG - Joint Test Action Group connections to Xtreme and Palladium systems. RTCK support allows transparent integration of the JTAG interfaces at lower core emulation speeds. This allows FS2 system probes tied to the emulation system to support higher speed JTAG interaction with a variety of software debuggers, ranging from 8-bit 8051 cores to leading-edge MIPS([R]) processors. "In the last few years, we have worked very closely with FS2 supporting our Xtreme and Palladium customers, helping them to cross debug hardware and software in their design and shorten their time-to-market," said Ran Avinun, Incisive marketing group director, Cadence. "The combination of FS2's debug capabilities and the new Cadence ESL Verification solution automates and manages the entire process from system definition to system validation, providing the most predictable path to system-level quality." FS2 and Cadence will enable interoperability between FS2's Logic Navigator(TM) and Bus Navigator(TM) on-chip instrumentation trace products and the Incisive ESL product solutions to allow high performance triggering and tracing of embedded IP blocks and embedded buses (AMBA AMBA Area Metropolitana de Buenos Aires (Spanish) AMBA Advanced Microcontroller Bus Architecture AMBA American Mold Builders Association AMBA American Mustang and Burro Association AMBA Association of Master of Business Administration , OCP (processor) OCP - Order Code Processor. , etc.) respectively. The integration between FS2 and Incisive allows users to analyze essential signals and enable trace capture using Navigator on-chip instrumentation flow with handoff via VCD and other standard formats to Cadence verification tools. All FS2 instrumentation products are supported by FS2's high-performance System Navigator(TM) probing technology and work in conjunction with FS2's embedded processor debug blocks to provide comprehensive on-chip instrumentation and debug solutions. About FS2 First Silicon Solutions (FS2) specializes in hardware verification and debug technologies including on-chip instrumentation custom silicon IP, development tools, and design services for programming, testing and debug of embedded systems in FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. , SoC, SOPC SOPC System on a Programmable Chip SOPC Special Operations Preparation Course SOPC Second-Order Power Control SOPC Shuttle Operations and Planning Center SOPC 1-Stearoyl-2-Oleoyl-Sn-Glycero-3-Phosphatidylcholine SOPC Shaastra Online Programming Contest , ASSP (Application Specific Standard Part) An ASIC chip that is designed as a generic device for a particular market. Whereas an ASIC is typically used only by its creator, ASSPs are used by many different companies in the design of their products. See ASIC. and ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. designs. FS2 provides full system solutions with IP blocks for processor, logic, and complex system level designs, along with hardware and software tools for improved debug and analysis at all stages in the development cycle -- from system design and verification to software development and optimization. FS2 products enable silicon vendors and their customers to take their designs from "first silicon" to production faster, with a better understanding of the design performance and overall operation -- for faster time-to-market and higher quality products. FS2 is a division of MIPS Technologies, Inc. Additional information about First Silicon Solutions is available at www.fs2.com. MIPS, FS2, First Silicon Solutions, Bus Navigator, Logic Navigator, and System Navigator are trademarks or registered trademarks of MIPS Technologies, Inc. in the United States and other countries. Incisive, Palladium and Xtreme are registered trademarks of Cadence Design Systems (company) Cadence Design Systems - A company that sells electronic design automation software and services. http://cadence.com/. See also Verilog. Inc. |
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