Fanning the flames: will a fire, plus much-needed patent reform, mean a healthier IC industry?

With an increasing number of companies depending on assembly and test services subcontractors to provide packages for the future, the industry must have the resources to meet the challenge. Until recently profit margins among IC package subcontractors had declined to 10% or less. The low margins are ominous: products increasingly depend on new packages and advances in assembly technology, and yet companies have limited resources to invest in these areas.

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A critical roadblock in the introduction of low-k dielectrics has been the assembly process. As RoHS-compliant materials are rolled out, additional developmental work is anticipated. Each new material requires the expensive, time-consuming process of package requalification. Who will pay the bill?

Product miniaturization and greater functionality in smaller form factors requires new packaging concepts. Many recently introduced stacked packages required years of research and development by IC package subcontractors. Amkor has spent four years on its Package-on-Package concept; STATSChipPAC has invested similar time in its Package-in-Package concept. Both took a significant resource commitment.

To cut costs, many semiconductor companies have gutted in-house packaging and assembly departments. Fabless semiconductor companies rarely have labs, evaluation equipment, semiconductor packaging and assembly engineers, or even understand the materials-science issues related to the adoption of new materials and packaging concepts. So who has the resources to develop the future semiconductor packages? Silicon foundries are being called upon to bridge the gap. TSMC, for example, has 800 engineers focused on addressing the critical issues in packaging assembly and test. Will the foundries be able to play this new role or will they need to consider a reverse vertical integration--entering into tighter relationships with the assembly and test houses to form virtual IDMs reminiscent of the IBMs and AT&T Bell Labs long ago?

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May 1, 2005, marked a turning point. A fire at ASE's Chung-Li, Taiwan, facility destroyed 100 testers (7% of ASE's total), 500 wire bonders (10% of ASE's total assembly capacity) and completely gutted the company's flip-chip substrate production. In addition, a large percentage of its laminate PBGA and CSP substrate capacity was destroyed: Some estimates place the number as high as 10% of the world's total capacity for wire-bond PBGA substrates. During SemiCon Singapore, Dr. Tien Wu of ASE said it was actually healthy for the industry. A strange comment, it seemed at the time, but it proved prophetic. A few months later, Amkor and ASE officials confirmed that assembly prices have increased. With ASE's fire and the ensuing decreased capacity, the industry is experiencing price increases of 10 to 15% for substrates and the increases are being passed along as higher prices for assembly services. These price increases will result in improved margins for the IC package contract assembly providers, at the expense of the semiconductor makers (fabless or otherwise).

Where's the good news? Price competition in assembly services experienced in the past few years eroded the margins of the assembly and test houses to the point that the industry became unhealthy. While the margin gains of the IC package industry may be at the expense of the semiconductor makers, the outcome will be better in the long run. Fabless companies depend on the assembly houses to develop next-generation packages, new assembly methods and qualify new materials. This requires resources and without improved margins, the industry is in jeopardy of not being able to develop future packaging technology. It is also essential for the subcontractors to generate a ROI that permits the capacity expansions required for industry growth.

Improved margins can be wiped out by the high cost of litigation in intellectual property disputes. Companies have a right and an obligation to their shareholders to defend their patents. However, the cost can be high. Legal fees in some disputes are more than $20 million. The patent office cannot keep up with the number of patents issued and some question the claims that are allowed today. Around 3,000 examiners work in the U.S. patent office today, but the number of patents is increasing. In 2004, 422,206 patents were filed. You can do the math. The PTO receives money that could be applied to hiring additional examiners. However, the U.S. Congress takes 25% of the PTO's revenue and uses it for other purposes. It is time for electronics industry associations and corporations to join forces to lobby for reform of the patent office and the uses of its revenues.

IC packaging and assembly is in an era of transition. A corner has been turned in the downward spiral of ruinous price competition that eroded margins to shameful levels. Will the industry be able to maintain the new prices levels in the next downturn or will companies cut prices to fill factory lines that become idle? Will the foundries step up to become a new virtual IDM providing design, fab, assembly and test under one roof? Will the industry have the resources to continue the development of the future packages and assembly techniques required for tomorrow's products? Stay tuned.

E. Jan Vardaman is president of TechSearch International, Austin, TX; [e-mail]. Her column appears semimonthly.