Fabless Semiconductor Start-Up SiByte Announces Breakthrough MIPS64 Microprocessor Core -- Delivers up to 1 GHz at Less than 2.5 Watts.Business Editors and High-Tech Writers SANTA CLARA, Calif.--(BUSINESS WIRE)--June 12, 2000 World's Most Power-Efficient Core in its Performance Class SiByte, Inc., a leading communications processor start-up, will announce the details of the SB-1(TM), its first high-performance, power efficient MIPS (Million Instructions Per Second) The execution speed of a computer. For example, .5 MIPS is 500,000 instructions per second; 100 MIPS is a hundred million instructions per second. 64(TM) CPU CPU in full central processing unit Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit. core, at the Embedded Processor Forum that begins this week on June 13th in San Jose, California San Jose (IPA: /ˌsænhoʊˈzeɪ/) is the third-largest city in California, and the tenth-largest in the United States. It is the county seat of Santa Clara County. . Targeted at the dynamic, fast-growing networking and communications markets, the SiByte SB-1 processor core will deliver up to 1 GHz in performance at less than 2.5 watts, making it ideal for backbone, enterprise and access networks. SiByte's strategy is to leverage the SB-1 core to bring to market a complete family of System-on-Chip (SoC) products. "With the SB-1, SiByte is bringing high-end server class performance to the embedded market space," said Atiq Raza, Chairman and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. of Raza Foundries, and member of SiByte's Board of Directors. "As networks continue to scale to OC-48, OC-192 and beyond, the need for very high performance processors becomes critical. The speed and power efficiency of the SB-1 core delivers breakthrough performance for today's broadband networks." The SiByte SB-1 is a high-performance, low power implementation of the MIPS64 Instruction Set Architecture (ISA (1) (Instruction Set Architecture) See instruction set. (2) (Interactive Services Association) See Internet Alliance. (3) (Internet Security and Acceleration) See .NET. ). The SiByte SB-1 core supports a quad-issue pipeline, which can dispatch up to two memory and two ALU (Arithmetic Logic Unit) The high-speed CPU circuit that does calculating and comparing. Numbers are transferred from memory into the ALU for calculation, and the results are sent back into memory. Alphanumeric data are sent from memory into the ALU for comparing. (integer or floating point) instructions per cycle In computer architecture, Instructions Per Clock (Instruction Per Cycle or IPC) is a term used to describe one aspect of a processor's performance: the average number of instructions executed for each clock cycle. . A 32K Data cache and a 32K Instruction cache are built into the core, each 4-way associative. The core also includes a 128-entry, fully set associative TLB (Translation Lookaside Buffer A Translation Lookaside Buffer (TLB) is a CPU cache that is used by memory management hardware to improve the speed of virtual address translation. A TLB has a fixed number of slots containing page table entries, which map virtual addresses onto physical addresses. ) and advanced branch predictors to optimize flow through the pipeline. Based on preliminary benchmark results, the SB-1 delivers more than 2000 Dhrystone 2.1 MIPS at 1 GHz. This translates to more than 800 MIPS/watt, making it the world's most power-efficient core in its performance class. "SiByte has done a great job of maximizing the high performance attributes of the MIPS64 architecture," said John Bourgoin, Chairman and CEO of MIPS Technologies. "We are excited that they will give customers more MIPS-based(TM) options when looking for high performance, low power processor solutions. SiByte has leveraged the MIPS64 architecture to deliver a truly industry leading core." In addition to its optimized, fully pipelined memory and ALU pipes, the SB-1 also supports on-chip multi-processing, enabling more than one core to be placed on chip in a single die. The SB-1 core will be built using industry-leading .15 micron technology through a major semiconductor foundry yet to be announced To be announced (TBA) A contract for the purchase or sale of an MBS to be delivered at an agreed-upon future date but does not include a specified pool number and number of pools or precise amount to be delivered. . "The SB-1 core shows great promise. It's the most powerful MIPS-compatible embedded-processor core ever designed," said Tom Halfhill, Senior Editor for Microprocessor Report. "If SiByte follows through and delivers an SB-1 processor that runs at 1 GHz and consumes only 2.5W, it will be a significant accomplishment for a company that was founded only two years ago and a credit to SiByte's engineering team." The SB-1 CPU core will be the foundation for multiple System-on-Chip (SoC) products from SiByte. The company is working with industry-standard memory and I/O subsystem vendors to ensure a highly integrated, high-performance SoC solution is available to customers. The company is also partnering with leading third party embedded operating system An operating system used in special-purpose applications (embedded systems). Embedded operating systems are typically very compact and often designed for real time operations. See embedded Linux, QNX, OS-9, Windows XP Embedded, Windows CE, VxWorks and Symbian OS. , applications, and tools vendors to provide comprehensive software and tools support. "In the past 20 years, I have been fortunate to lead some of the finest microprocessor design teams ever assembled, including MicroVax, Alpha and StrongARM. The SiByte team we have built is in the same league, with extremely talented, highly experienced professionals, who really know how to work together," said Dan Dobberpuhl, President and CEO of SiByte. "This is clearly evident in the superb performance/power of the SB-1 CPU core, which will serve as the engine for our upcoming generation of products targeted at the exploding Internet infrastructure equipment market." About SiByte, Inc. SiByte, Inc. is a privately held fabless semiconductor company A fabless semiconductor company specializes in the design and sale of hardware devices implemented on semiconductor chips. It achieves an advantage by outsourcing the fabrication of the devices to a specialized semiconductor manufacturer called a semiconductor foundry or "fab. focused on the Internet infrastructure equipment market. Based in Santa Clara, California Santa Clara, California (IPA: /ˌsæntəˈklærə/) , founded in 1777 and incorporated in 1852, is a city in Santa Clara County, in the U.S. state of California. , SiByte can be reached at 408/845-6600 or http://www.sibyte.com. About MIPS Technologies, Inc. MIPS Technologies, Inc. is one of the world's primary architects of embedded 32- and 64-bit RISC processors. The company drives the broadest architectural alliance that is delivering 32- and 64-bit embedded RISC RISC in full Reduced Instruction Set Computing Computer architecture that uses a limited number of instructions. RISC became popular in microprocessors in the 1980s. solutions. The company licenses its intellectual property to semiconductor companies, ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. developers, and system OEMs. MIPS Technologies, Inc. and its licensees offer the widest range of robust, scalable processors in standard, custom, semi-custom and application-specific products. About Raza Foundries Raza Foundries(TM) is the premier broadband networking and communications foundry. The company builds and operates leading-edge broadband networking and communications Partner Companies to advance the Internet infrastructure. Raza Founderies provides a long-term commitment, world-class resources, best-practices management methods, and their Fast Track(TM) development process to accelerate the growth and success of each of their Partner Companies. SiByte is a registered trademark of SiByte, Inc. MIPS is a registered trademark and MIPS64 is a trademark of MIPS Technologies, Inc. All other trademarks are the property of their respective companies. |
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