Printer Friendly
The Free Library
14,558,825 articles and books
Member login
User name  
Password 
 
Join us Forgot password?

FPGA vs. ASIC Design Panel to Kick Off IEC Executive Forum @ DesignCon 2004.


Business Editors/High-Tech Writers

DesignCon 2004

CHICAGO--(BUSINESS WIRE)--Dec. 17, 2003

The International Engineering Consortium (IEC (International Electrotechnical Commission, Geneva, Switzerland, www.iec.ch) An organization that sets international electrical and electronics standards founded in 1906. It is made up of national committees from over 60 countries.

IEC - International Electrotechnical Commission
) has announced that the IEC Executive Forum @ DesignCon 2004 will begin on Wednesday, February 4, 2004 at 9:00 am at the Santa Clara Santa Clara, city, Cuba
Santa Clara (sän`tä klä`rä), city (1994 est. pop. 217,000), capital of Villa Clara prov., central Cuba.
 Convention Center in Santa Clara, California Santa Clara, California (IPA: /ˌsæntəˈklærə/) , founded in 1777 and incorporated in 1852, is a city in Santa Clara County, in the U.S. state of California. , with a panel discussion titled "FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market.  vs. ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor.  Design" sponsored by Mentor Graphics (NASDAQ NASDAQ
 in full National Association of Securities Dealers Automated Quotations

U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on
:MENT).

Industry leaders in both field-programmable gate arrays vs. application-specific integrated circuits will debate the pros and cons pros and cons
Noun, pl

the advantages and disadvantages of a situation [Latin pro for + con(tra) against]
 of FPGAs and ASICs as well as the viable emerging alternative--the structured ASIC solution--and will discuss how all three are shaping the future of electronic design automation. David Bursky, Editor at Large for Electronic Design Magazine, will chair the panel.

Panelists include Steve Douglass, Senior Director of New Product Development for the Advanced Products Group at Xilinx; Bryan Lewis, Director and Chief Analyst at Gartner Dataquest; Jim Smith, Director of EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board.  Vendor Relations at Altera; Richard Tobias, Vice President of the ASIC and Foundry Business Unit, Toshiba America Electronic Components; and Ronnie Vasishta, Vice President of Technology Product Marketing at LSI LSI: see integrated circuit.


(Large Scale Integration) Between 3,000 and 100,000 transistors on a chip. See SSI, MSI, VLSI and ULSI.
 Logic.

The Executive Forum provides an educational opportunity for industry leaders, with a full day of executive programming and the chance to meet, network, and trade knowledge and expertise in an interactive educational atmosphere.

Following the opening panel, DesignCon Conference Chair Greg Spirakis of Intel moderates the plenary panel "The Roadmap to 65 Nanometers: Design Needs and Technical Challenges." Tsugio Makimoto, Corporate Advisor for Semiconductor Operations at Sony Corporation, delivers the Wednesday keynote address preceding the opening of the technology exhibition at 12:30 pm.

The Executive Forum concludes with two Monday afternoon panels, "EDA Licensing Models" at 2:30 pm, chaired by Richard Tobias, and "Leadership in Times of Change" at 4:00 pm, chaired by Mark Pierpoint, Vice President of Marketing at Agilent Technologies.

As DesignCon continues to grow, the IEC Executive Forum @ DesignCon increasingly becomes an important experience for senior-level managers and executives in the semiconductor and EDA industries.

The Executive Forum is part of DesignCon's comprehensive educational program. Additional highlights of the program include keynote addresses by Aart de Geus, Chairman and Chief Executive Officer at Synopsys, and Jan Rabaey, Professor and Director of the Gigascale Research Laboratory at the University of California The University of California has a combined student body of more than 191,000 students, over 1,340,000 living alumni, and a combined systemwide and campus endowment of just over $7.3 billion (8th largest in the United States).  - Berkeley.

About DesignCon (http://www.designcon.com)

The DesignCon conference program provides education and updates on the latest technology news and advances affecting design engineers working at the chip, board, and system levels. DesignCon 2004 will feature specialized tutorials on nanotechnology and a new conference track devoted to wireless topics. The DesignCon technology exhibition delivers practical approaches, techniques, and procedures directly on the show floor, where leading-edge displays from key organizations offer proven solutions for immediate application.

About the International Engineering Consortium (http://www.iec.org)

The International Engineering Consortium (IEC) is a nonprofit organization Nonprofit Organization

An association that is given tax-free status. Donations to a non-profit organization are often tax deductible as well.

Notes:
Examples of non-profit organizations are charities, hospitals and schools.
 dedicated to catalyzing technology and business progress worldwide in a range of high-technology industries and their university communities. Since 1944, the IEC has provided high-quality educational opportunities for industry professionals, academics, and students. In conjunction with industry-leading companies, the IEC has developed an extensive, free, on-line educational program. The IEC conducts industry-university programs that have substantial impact on curricula. It also conducts research and develops publications, conferences, and technological exhibits that address major opportunities and challenges of the information age. More than 70 leading high-technology universities are IEC affiliates, and the IEC handles the affairs of the Electrical and Computer Engineering Department Heads Association.
COPYRIGHT 2003 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2003, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

 Reader Opinion

Title:

Comment:



 

Article Details
Printer friendly Cite/link Email Feedback
Publication:Business Wire
Date:Dec 17, 2003
Words:576
Previous Article:INS Experts Publish Two Books on Network Security; Adds to Expansive List of Thought-Leadership Publications on Networking Topics.
Next Article:Artisoft and CDR-DATA Partner for Comprehensive, Cost-Effective Call Accounting Solution.



Related Articles
AMI SEMICONDUCTOR LICENSES ARM MICROPROCESSOR CORES FOR ADVANCED FPGA-TO-ASIC DESIGNS.(ARM Computer ARM7TDMI and ARM Computer ARM922T)(Company...
CAST RELEASES JPEG CORES; FAST, COMPACT ENCODER AND DECODER READY FOR IMAGE PROCESSING APPLICATIONS.(JPEG-Fast-E encoder and JPEG-Fast-D...
IBM, XILINX SHAKE UP ART OF CHIP DESIGN WITH NEW CUSTOM PRODUCT.
Reference Design Village to Offer Hands-On Demonstrations at DesignCon 2003.
Teradyne Connection Systems to be Official Sponsor of the International Engineering Consortium's DesignCon East 2004.
International Engineering Consortium's Euro DesignCon 2004 to Offer a Series of Complimentary Educational Programming.
Xilinx intros next-gen EasyPath FPGAs priced below structured ASICs.(Field Programmable Gate-Array, Application Specific Integrated Circuit)
Bluespec Wins 2006 DesignVision Finalist Award; Bluespec ESL Synthesis Chosen as Finalist in the ASIC, IC Design Tools Category.
IEC Announces 2007 DesignVision Finalists Recognizing Best Tools and Products in Semiconductor Industry.
DesignVision Winners Take the Stage at DesignCon 2007 Accepting Awards for Best Tools and Products in Semiconductor Industry.

Terms of use | Copyright © 2009 Farlex, Inc. | Feedback | For webmasters | Submit articles