Printer Friendly
The Free Library
19,607,050 articles and books
Member login
User name  
Password 
 
Join us Forgot password?

FMC SOTA Design Technology Adopts Verplex Systems Formal Verification for Use Throughout Design Flow.


Business Editors/High-Tech Writers

MILPITAS, Calif.--(BUSINESS WIRE)--July 8, 2003

Notes Conformal LEC's Speed, Ease of Use, Thoroughness,

Verplex Superior Customer Support

FMC See fixed mobile convergence.  SOTA SOTA State Of The Art
SOTA School of the Arts (San Francisco)
SOTA Society of Typographic Aficionados
SOTA Salmon of the Americas
SOTA Society of the Ancients (gaming)
SOTA Society of Taiwanese Americans
 Design Technology of Hsinchu, Taiwan, today said it has adopted formal verification software from Verplex(TM) Systems Inc., and has used it successfully throughout its design flow on a variety of complex integrated circuit (IC) designs. It has designed chips that are today in use for wired and wireless networking and storage device applications.

A leading design services firm, FMC SOTA Design Technology selected Verplex's Conformal(R) Logic Equivalence Checker (LEC (1) (LAN Emulation Client) A software driver that provides LAN emulation (LANE) in an ATM network. It resides in an ATM end station or in a computer system that provides the LAN to ATM conversion, often known as a LAN access device. See LANE. ) after a competitive evaluation. It found that Conformal LEC offered faster functional verification capabilities, reducing time to market, decreasing the likelihood of re-spins, and increasing confidence in tapeout decisions.

At FMC SOTA, Conformal is used to compare register-transfer level (RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; ) and gate-level netlists after logic synthesis; gate-level to gate-level netlist comparisons after scan insertion; gate-level to gate-level netlist comparisons after physical optimization; and RTL to gate-level netlist comparisons after engineering change orders (ECOs.)

"Our experience with Verplex has been top rate," says Peter Hsieh, president of FMC SOTA Design Technology. "Its Conformal LEC is fast, easy to use and offers a completely independent check of our design tools, giving us further confidence in our designs. Its customer support team is the best in the industry, helping us quickly integrate Conformal LEC into our flow for verifying our chips."

"FMC SOTA Design Technology is developing leading-edge chips and needs tools to accommodate its demandingly complex designs," adds C. Michael Chang, president and chief executive officer (CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. ) of Verplex. "Verplex tools have always been superior for verifying the type of large, complex chips that FMC SOTA designs, so our close working partnership with them is a natural fit."

About FMC SOTA Design Technology

FMC SOTA Design Technology offers design services from specification, logic synthesis, testbench development, design-for-test, physical implementation, physical verification and full turnkey services including silicon procurement. With a portfolio of pre-validated digital and analog IP blocks, it can reduce design risk and accelerate time-to-market for fabless, IDM (1) See identity management.

(2) (Integrated Device Manufacturer) A company that performs every step of the chip-making process, including design, manufacture, test and packaging. Examples of IDMs are Intel, AMD, Motorola, IBM, TI and Lucent.
 and system companies. FMC SOTA is the first Taiwan-based design center approved by ARM (ATAP ATAP Association of Assistive Technology Act Programs (Delmar, NY)
ATAP Anti-Terrorism Assistance Program
ATAP Acquisition Tuition Assistance Program (US Army)
ATAP Advanced Tactical Aircraft Protection
). Other SoC partnerships include DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive  Group WW2nd certification, Toshiba design partner and design service partner for Artisan Components, MoSys and Virage Logic. More details can be found at: http://www.sota.fulhua.com.

About Verplex

Verplex Systems Inc. is an electronic design automation (EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. ) company focused on delivering the highest-speed, highest-capacity and easiest-to-use formal verification products for complex system-on-chip (SOC) design. Founded in 1997, it is privately held and funded by leading venture capital firms Name Location Founding date Managing Partners/Directors Specialty Capital managed
5AM Ventures Menlo Park, CA; Waltham, MA 2002 John Diekman, PhD (managing partner), Scott Rocklage, PhD (managing partner), Andrew Schwab (managing partner) life sciences $200M [1]
. Corporate headquarters is located at 300 Montague Expressway, Suite 100, Milpitas, Calif. 95035. Telephone: (408) 586-0300. Facsimile: (408) 586-0230. Email: info@verplex.com. Online information is found at its web site: http://www.verplex.com.

Verplex is a trademark of Verplex Systems, Inc. Conformal is a registered mark of Verplex Systems Inc. All other companies and products referenced herein are trademarks or registered trademarks of their respective holders.
COPYRIGHT 2003 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2003, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

 Reader Opinion

Title:

Comment:



 

Article Details
Printer friendly Cite/link Email Feedback
Publication:Business Wire
Date:Jul 8, 2003
Words:501
Previous Article:REMINDER/Media and Photo Alert: Kites Designed for Disabled to Be Flown by Wheelchair Kids and Athletes at Veterans Wheelchair Games in Long Beach...
Next Article:ACNielsen Named Nestle Waters New Preferred Provider of Marketing Information and Consumer Insights.
Topics:



Related Articles
VERPLEX SHIPS FULL-CHIP FORMAL RTL DESIGN VERIFICATION TOOL THAT CUTS LEARNING CURVE.
Real Intent Introduces Linux Versions : OF ITS INTENT-DRIVEN FORMAL VERIFICATION SYSTEM, VERIX.
REAL INTENT INTRODUCES LINUX VERSIONS OF ITS INTENT-DRIVEN FORMAL VERIFICATION SYSTEM, VERIX.
AGILENT'S NETWORKING AND COMPUTING GROUP INCORPORATES VERPLEX FORMAL VERIFICATION SOLUTION IN DESIGN FLOW.
NEC CORPORATION STANDARDIZES ON VERPLEX FORMAL VERIFICATION TOOLS.
Sunplus selects Verplex to verify all chip designs.
Verplex Launches 'Project Golden Silicon' Online Educational Site.
Cadence Signs Definitive Agreement to Acquire Verplex; Electronic Design Leader Enhances RTL-GDSII Flow with Market-Leading Formal Verification...
Verplex Signs Definitive Agreement to be Acquired by Cadence; Best-in-Class Formal Verification Enhances RTL Design Flow for Electronic Design Leader.
REPEAT/Verplex Signs Definitive Agreement to be Acquired by Cadence; Best-in-Class Formal Verification Enhances RTL Design Flow for Electronic Design...

Terms of use | Copyright © 2012 Farlex, Inc. | Feedback | For webmasters | Submit articles