Exemplar Logic Targets One Million Gate Programmable Logic Devices With New Release of LeonardoSpectrum Synthesis Tool.

FREMONT, Calif.--(BUSINESS WIRE)--July 26, 1999--

Exemplar Logic Inc., a wholly owned subsidiary of Mentor Graphics Corp. (Nasdaq: MENT), today announced a new version of its popular LeonardoSpectrum(TM) synthesis tool that makes programmable logic devices (PLDs) of one million gates or more easier and faster to design.

LeonardoSpectrum 99.1 enhancements include:

-- Improved team design flow capabilities that enable electronic design engineers to develop field programmable gate arrays (FPGAs) by working together at the block level, resulting in faster and more efficient chip designs.

-- A unique approach to incremental synthesis that can dramatically accelerate design iterations, reducing cycle time from hours to minutes.

-- New algorithms that enable LeonardoSpectrum to analyze an entire million-gate design and automatically make chip-level optimizations that reduce area and improve chip performance.

-- Quality of results improvements of up to 60 percent in area and timing performance.

"The LeonardoSpectrum synthesis tool meets the needs of electronic engineers doing push-button designs and designs of one million plus gates," said Marcell Enoch, principal engineer for WaveMark Technologies, developer of high-performance embedded controller designs for the printer-manufacturer market. "This round of enhancements reaffirms LeonardoSpectrum's status as the leading synthesis tool offering the highest quality of results."

"Gate densities in the millions require technologies and methodologies that enable designers to make the most of today's high-density architectures," said Tom Feist, Exemplar's vice president of marketing. "With the latest LeonardoSpectrum tool, designers can target ASICs, complex programmable logic devices (CPLDs) and FPGAs. They also can use it to graphically partition a single ASIC into multiple FPGAs, resulting in more efficient and less costly ASIC designs."

Enhanced Device Support

LeonardoSpectrum 99.1 features several new technologies from Actel (Nasdaq: ACTL), Altera (Nasdaq: ALTR), Dynachip, Lattice/Vantis (Nasdaq: LSCC) and Xilinx (Nasdaq: XLNX) [For details, see fact sheet at end of release.] These new devices, combined with existing technologies, give customers the most extensive programmable logic support available, allowing them to make complete device price/performance tradeoffs.

Pricing and Availability

LeonardoSpectrum 99.1 is available immediately. Prices for node-locked PC versions start at $4,500. The tool runs on Windows NT, 95 and 98, Solaris and HP-UX platforms. For a demonstration, please visit www.exemplar.com.

LeonardoSpectrum 99.1 Fact Sheet The latest version of LeonardoSpectrum includes:

-- Support for Actel ProASIC(TM).

-- Support for Altera(R) Flex(R) 10KE, Flex 10KA, Flex 10KB, Altera's new APEX(TM) 20K device and its Quartus(TM) place and route software. New pre-placement and mapping technology has been developed for APEX that enables LeonardoSpectrum to perform incremental optimization after place and route using SDF back-annotated timing data. The Quartus NativeLink(TM) interface is used by LeonardoSpectrum's P&R Integrator (TM) to encapsulate the place and route process and provide a seamless transition from synthesis to implementation.

-- Dynachip(R) DL6K(TM) & DY6K(TM) libraries.

-- Lattice(R) isp(TM)5000 and isp8000,

-- All Vantis(R) Mach(TM) devices are supported with new optimization technology providing best in class quality of results.

-- Enhanced support for Xilinx(R) Virtex(TM) and XC4000(TM) devices, Xilinx 4000XLA(TM) and SpartanXL(TM).

-- Block RAM and ROM inference for both single and dual-port RAMs, IOB register inference and replication, improved mapping to MUX5 and MUX6 cells, extended use of Virtex registers and inference and inference of DASR (Dynamically Addressable Shift Registers).

About Exemplar Logic

Exemplar Logic, Inc. is a wholly owned subsidiary of Mentor Graphics Corporation, a world leader in electronic hardware and software design solutions. Exemplar pioneered applying logic synthesis techniques to the design of FPGAs, CPLDs and ASICs. The company is the world's number one PLD synthesis tool supplier, as reported by Dataquest. Exemplar's products are sold and supported worldwide by Exemplar Logic, its OEMs and VARs, Mentor Graphics and through the FPGA and CPLD component distribution channel. Exemplar's design environments implement a complete high-level design solution for FPGA, CPLD and ASIC design, offering synthesis, simulation and timing analysis for Windows 95/98, Windows-NT and UNIX (HP, Sun) platforms in server and non-server environments. Exemplar Logic is located at 6503 Dumbarton Circle, Fremont, CA. 94555. It has 28 sales and distribution offices in the United States, Europe, Japan and the Pacific Rim. For information on Exemplar representatives or products, please call [phone], e-mail: [e-mail]., or visit www.exemplar.com

Note to Editor: LeonardoSpectrum and P&R Integrator are trademarks of Exemplar Logic. ProASIC is a registered trademark of Actel Corp. Inc. Altera, all Flex products, APEX, Quartus and NativeLink are registered trademarks of Altera Corp. Dynachip, DL6K and DY6K are registered trademarks of Dynachip Corp. Lattice and all isp products are registered trademarks of Lattice Semiconductor Corp. Vantis and Mach are registered trademarks of Advanced Micro Devices, Inc/Vantis Corp. Xilinx, Virtex and associated Virtex products, XC4000, XC4000XLA and SpartanLX are trademarks of Xilinx.