Exemplar Logic Announces Full Support for Ten-Million System Gate Architecture.

Business/Technology Editors

SAN JOSE, Calif.--(BUSINESS WIRE)--July 17, 2000

Exemplar's LeonardoSpectrum Solution Enables Next-Generation

Synthesis for Ultra High-Density FPGA designs

Exemplar Logic Inc.(R), a Mentor Graphics Company, today announced that its LeonardoSpectrum(TM) 2000 is the first synthesis solution to fully support the new, high-performance Virtex(TM)-II architecture from Xilinx Inc. (NASDAQ: XLNX). The milestone is a direct result of Exemplar's rapid software development process that gives customers Internet access to monthly updates of Exemplar's synthesis design tools. LeonardoSpectrum provides Xilinx customers with an accurate and easy-to-use synthesis tool for ultra high-density Field Programmable Gate Array (FPGA) design, featuring modular design, TimeCloser(TM) technology for rapid timing closure, incremental design flows and bi-directional integration with Xilinx place and route and floorplanning tools for designs beyond ten-million system gates.

Integrated circuit innovations in the Application Specific Integrated Circuit (ASIC) design community have outpaced the functionality of Electronic Design Automation (EDA) tools, creating a design gap that has limited designer productivity. Advanced technologies such as Exemplar's TimeCloser are available now to help designers realize maximum design speeds with Virtex-II FPGAs, avoiding the bottleneck that stalled many advanced ASIC design starts. LeonardoSpectrum 2000 with TimeCloser technology is optimized for ten-million system-gate designs and beyond, enabling second-pass TrueTiming(TM) optimization based on accurate physical data. For system integrators incorporating the Virtex-II architecture into systems such as Internet infrastructure, voice and video processing and mass storage applications, LeonardoSpectrum helps realize rapid timing closure and accelerated time-to-market.

"Our close partnership with Exemplar creates a seamless flow, from floorplanning through synthesis and place and route, that is critical to maximizing productivity and efficiency from our latest architectures," said Rich Sevcik, senior vice president and general manager of Intellectual Property, Services and Software at Xilinx. "LeonardoSpectrum, integrated with our floorplanner, is specifically designed to minimize iterations through synthesis and place and route, accelerating design processes and solving the timing closure bottleneck."

LeonardoSpectrum's support for Virtex-II designs includes device specific optimizations and a new bi-directional place-and-route interface that allows timing optimization based on accurate, physical data. Accurate timing data ensures that LeonardoSpectrum's path-based timing optimization identifies and optimizes the correct critical path, ensuring the highest quality of results possible. In addition, LeonardoSpectrum 2000 contains several Xilinx-specific flows, including support for modular design, incremental synthesis, and hierarchical floorplanning.

"With the high density of the Virtex-II architecture, Xilinx has ushered FPGAs into markets and applications previously addressed solely by ASIC solutions," said Jose Torres, general manager for Exemplar Logic. "To realize the full potential of these new architectures requires a new generation of design tools. We develop our synthesis solutions in close collaboration with the leading FPGA vendors to ensure that the next-generation synthesis requirements of FPGA designers are met at the same pace as new architectures are rolled out."

Price and Availability

LeonardoSpectrum 2000 is available now. The TimeCloser technology is available in the Level 3 version of the product. U.S. list price starts at $4,500. The tool runs on Windows(R)-NT, 95, 98 and 2000, Solaris and HP-UX platforms. LeonardoSpectrum is also available as part of the FPGA Advantage(TM)Design Solution from Mentor Graphics.

About Xilinx

Xilinx is the leading innovator of complete programmable logic solutions, including advanced integrated circuits, software design tools, predefined system functions delivered as cores, and unparalleled field engineering support. Founded in 1984 and headquartered in San Jose, Calif., Xilinx invented the field programmable gate array (FPGA) and commands more than half of the world market for these devices today. Xilinx solutions enable customers to significantly reduce the time required to develop products for the computer, peripheral, telecommunications, networking, industrial control, instrumentation, high-reliability/military, and consumer markets. For more information, visit the Xilinx web site at www.xilinx.com

About Exemplar Logic, Inc.

Exemplar Logic, Inc. is a Mentor Graphics Company (Nasdaq: MENT). Exemplar pioneered applying logic synthesis techniques to the design of FPGAs, CPLDs and ASICs. It is the world's number one CPLD and FPGA synthesis tool supplier, as reported by Dataquest. Exemplar's products are sold and supported worldwide by Exemplar Logic, its OEMs and VARs, Mentor Graphics and through the FPGA and CPLD component distribution channel. Exemplar's design environments implement a complete high-level design solution for FPGA, CPLD and ASIC design, offering synthesis, simulation and timing analysis for Windows(R) 95/98, Windows-NT and UNIX (HP, Sun) platforms in server and non-server environments. Exemplar Logic is located at 880 Ridder Park Drive, San Jose, California 95131. For information on Exemplar representatives or products, please call [phone], e-mail: [e-mail], or visit www.exemplar.com.

Exemplar Logic, LeonardoSpectrum, TimeCloser, and FPGA Advantage are trademarks of Mentor Graphics Corp. Virtex is a trademark of Xilinx, Inc. Windows is a registered trademark of Microsoft Corp. All other company and/or product names are the trademarks and/or registered trademarks of their respective owners.