Exemplar Logic Adds Multimedia VHDL Training For Its Galileo Design Environment; Company to Offer Esperan's CD-ROM-based Multimedia VHDL Tutorials.

supplier of High-Level Design (HLD) software tools for the Electronic Design Automation (EDA) market (Alameda, CA), today announced that it will offer its customers Esperan's VHDL multimedia tutorial, MasterClass.

Esperan's VHDL MasterClass is a self-paced CD-based multimedia tutorial that runs under Windows. It reduces the time required to learn VHDL by combining a multimedia tutorial with a series of design exercises. At the same time, MasterClass introduces the user to Exemplar Logic software through a series of Exemplar-specific lab exercises that illustrate how to use VHDL within the Exemplar Logic tool set. The tool also provides experienced VHDL designers with a fast, effective reference during VHDL-based projects.

MasterClass makes extensive use of graphics to provide simple, clear explanations, and adds a sound commentary to provide emphasis and aid comprehension. It presents VHDL from a real-world perspective, explaining the language from a hardware point of view. MasterClass covers syntax and synthesis coding styles most commonly used in FPGA based design projects. Topics covered include definition of behavioral and RTL abstraction levels, major VHDL constructs, hierarchy, rules for manipulating signals and defining data types, how to simulate your design, how to write synthesizable VHDL code, and how to mix concurrent and sequential statements.

According to Bob Barker, Exemplar Logic's vice-president of marketing, "Today Esperan's MasterClass is a leading-edge multimedia tutorial available for designers learning VHDL. We have added the VHDL MasterClass to our product offering to give our customers additional language training options for their design engineers."

Exemplar Logic is demonstrating MasterClass at the VIUF, booth no. 23, November 16 and 17, 1995 at the Newton Marriott near Boston.

Pricing and availability

MasterClass for Windows 3.1 is available now from Exemplar Logic. U.S. pricing is $499; contact Exemplar Logic sales offices for information on international pricing.

For information contact:

Exemplar Logic Inc. 815 Atlantic Ave., Suite 105, Alameda, CA 94501-2274 [phone], Fax: [phone] [e-mail]. Exemplar Logic (Europe) Doncastle House, Doncastle Road Bracknell, Berkshire RG12 8PE United Kingdom [phone], Fax: [phone] [e-mail]

About Exemplar Logic

Exemplar Logic, founded in 1987 by Ewald Detjens, pioneered applying logic synthesis techniques to the design of CPLDs and FPGAs. The company develops and markets EDA software tools. Its products are sold worldwide through its U.S. and European sales offices and international distributors. Exemplar's Galileo tool suite implements a complete high-level design solution for FPGA, CPLD and ASIC design, offering synthesis, simulation and timing analysis on Windows, Windows-NT, HP and Sun platforms.

About Esperan

Esperan was formed in July 1992, as an independent specializing in training and education in the area of high level design. The company's philosophy is based upon teaching not only language details, but also the real issues that make users successful on design projects. Esperan have trained over 1,800 engineers in the last three years. The MasterClass multimedia tutorial was introduced in August 1994 to address the needs of the PC-based VHDL user who is designing FPGA and CPLD devices. -0-

NOTE TO EDITORS: At VHDL International Users' Forum. Galileo, Logic Explorer, Time Explorer, TimeScope, NetScope, and TimeShuttle are trademarks of Exemplar Logic. V-System is a trademark of Model Technology.

Acronyms:

HDL  Hardware Description Language 

HLD High-Level Design

VHDL VHSIC (Very High Speed Integrated Circuit) HDL

VIUF VHDL International User Forum

CONTACT: Exemplar Logic (PR Counsel)

Georgia Marszalek, 415/345-7477

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or

Exemplar Logic (Product Marketing Manager)

Ashena Massoumi, 510/337-3720

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