Excess Bandwidth Introduces Industry's Longest Reach Symmetric DSL Chipset Solution.

Business Editors/High-Tech Writers

CUPERTINO, Calif.--(BUSINESS WIRE)--June 27, 2000

Innovative Standards-Compliant Architecture

Doubles the Coverage Area of Existing Solutions

Excess Bandwidth Corporation, a developer of semiconductor solutions for high-speed voice and data communications using the existing copper wire infrastructure, today introduced the EBS720/710 Symmetric DSL Processor, a two-chip set for the implementation of symmetric Digital Subscriber Line (DSL) network equipment.

With an innovative network processor-based architecture, the chip set exceeds the range and data rate specifications of new U.S. and proposed international standards for 1.5 megabit per second (Mbps) and 2.3 Mbps symmetric DSL service.

The EBS720/710 chipset supports two new symmetric DSL standards: HDSL2 and G.shdsl (ITU G.991.2). Both standards provide for high-speed, symmetric connectivity over a single twisted copper wire pair, while offering outstanding reach, stability, and robustness. In addition, the unmatched performance of the Excess Bandwidth solution allows systems based on the product to provide a DSL coverage area nearly double that of competitive solutions.

"We see high-speed symmetric DSL as the logical next-generation technology for the deployment of high-capacity Internet and voice services to small and medium-size businesses," said Steven Dines, president and CEO of Excess Bandwidth Corp. "Mission-critical business technologies such as Voice-over-DSL and video conferencing demand the robust communications channel afforded by our symmetric DSL solution."

Excess Bandwidth designed the chipset for use in both central office DSL access multiplexer (DSLAM) equipment and customer premise devices. Since the new symmetric DSL standards also support the use of repeaters to extend service range, the chip set is expected to also win designs in this area.

Exceeding Specifications

The HDSL2 specification, defined by the American National Standards Institute (ANSI), calls for data transmission at a fixed rate of 1.5 Mbps over distances up to 12,000 feet. The G.shdsl (G.991.2) specification being defined by the International Telecommunications Union (ITU) is a rate adaptive symmetric service that will support speeds from 192 Kbps to 2.3 Mbps with a reach of over 20,000 feet.

The G.shdsl specification also allows for two wire-pair transmission, which can double the range or data rate of the service. With the addition of repeaters in the local loop, effective service range can be dramatically increased with no loss of data rate performance.

A number of proprietary features in the design and implementation of the Excess Bandwidth chipset enable the company to surpass the range specifications of the standards. The chipset extends the reach of the 1.5 Mbps HDSL2 standard to 18,000 feet providing a vastly increased service area. In systems designed for compliance with rate adaptive G.shdsl, Excess Bandwidth has found that its performance can effectively increase DSL coverage area by over 90 percent.

Highly Optimized Architecture

The key to the outstanding performance of the Excess Bandwidth solution is the coupling of advanced signal processing algorithms with unique network processor-based silicon architecture.

"The algorithms we have implemented for line training, equalization and echo cancellation are orders of magnitude more sophisticated than any used in the DSL area to date," said Dr. Debajyoti Pal, CTO and founder of Excess Bandwidth. "To implement these algorithms we chose to use an on-chip MIPS processor with computing power 100 times that found in our competitor's products. Our approach provides us with performance within 1dB of theoretical limits for digital transmission over copper-wire."

The two-chip set includes the EBS710 Digitally Tuned Analog Front End (AFE) and the EBS720 Symmetric DSL Processor. The EBS710 AFE provides analog-to-digital (A/D) and digital-to-analog (D/A) conversion, signal amplification, filtering, and clock synthesis functions. In addition, the EBS710 incorporates two patented innovations that improve DSL performance dramatically:

-- Analog circuitry within the EBS710 can be tuned under control

from the EBS720 processor allowing for better adaptability to

real-world line conditions. The ability to tune the AFE is an

industry first in the DSL market.

-- The EBS710 includes a patented capability called adaptive echo

synthesis (AES) that can reduce the effects of local echo by

up to 10dB.

The EBS720 Symmetric DSL Processor provides all of the digital functions including framing, forward error correction, digital filtering, echo cancellation, inbound error correction and performance monitoring. An on-chip 100 million instruction-per-second MIPS(TM) RISC processor is used to perform initial line training algorithms.

After training, the MIPS processor constantly monitors and tunes the signal processing elements for optimum performance during normal operation. The EBS720 supports the draft G.shdsl (ITU G.991.2) standard, the ANSI HDSL2 standard and includes a 2B1Q SDSL mode for compatibility with legacy symmetric DSL equipment.

Evaluation and Development Tools

The EBS720/710 chipset is supported by a variety of hardware and software development tools:

-- The EN72010-1 Evaluation System implements a complete single

channel G.shdsl/HDSL2/SDSL modem and is designed for simple

connection to most bit error ratio and line simulation

equipment. The EN72010-1 may also be easily connected to

existing ATM-based designs through a UTOPIA-2 connector. A

Windows-based graphical user interface provides complete

control of modem configuration, as well as performance

monitoring capability. Documentation for the EN72010-1

includes complete schematics, bill-of-materials and board

layout recommendations.

-- A Host Application Programmer's Interface (API) for the EBS720

is also available. The API is written in C for rapid porting

to a variety of host processors and real-time operating

systems.

Price and Availability

The EBS720 and EBS710 chipset is sampling now, and is priced at $35 in 10,000-unit quantities. The EN72010-1 Evaluation System will be available in July.

About Excess Bandwidth

Headquartered in Cupertino, Calif., Excess Bandwidth Corporation develops advanced algorithms for high-bandwidth communications applications and implements those algorithms as integrated circuits. Founded in 1998, the company is applying its strong systems and mixed-signal design expertise to create "telenetworking" solutions, which intelligently drive data over the existing telecommunications infrastructure. Its initial effort is focused on symmetric DSL (digital subscriber line) technologies, such as G.shdsl and HDSL2, which allow transmission of high-speed voice and data over a single pair of copper wires.

Notes to Editors:

1. Product brief descriptions of the EBS720/710 chip set can be downloaded from the Excess Bandwidth Web site: www.exbc.com

2. Digital (jpg or tiff) photos of the EN72010-1 Evaluation System and Development Kit are available on request from FS Communications.