Enea's OSEck DSP RTOS First to Support Freescale's New MSC8144 Multicore DSP; Freescale DSP and OSEck RTOS Provide Ideal Platform for Telecom Infrastructure Applications Requiring High-Speed Media Packet Processing.SAN JOSE, Calif. -- Enea (STO:ENEA), the world leader in advanced device software, today announced the availability of its OSEck real-time operating system (operating system) Real-Time Operating System - (RTOS) Any operating system where interrupts are guaranteed to be handled within a certain specified maximum time, thereby making it suitable for control of hardware in embedded systems and other time-critical applications. (RTOS (1) (RealTime Operating System) An operating system designed for use in a real time computer system. See real time system, embedded system, process control and OS-9. ) for Freescale's MSC8144 multicore digital signal processor A digital signal processor (DSP) is a specialized microprocessor designed specifically for digital signal processing, generally in real-time computing. Characteristics of typical Digital Signal Processors
LinX Law Enforcement Information Exchange LINX Logistics Information Exchange interprocess communications (IPC) services, which greatly simplify the design of complex telecom infrastructure applications spanning multiple MSC8144 cores and processors. "The MSC8144's four DSP cores offer tremendous raw processing performance, and provide an attractive platform for deploying complex distributed telecom infrastructure applications requiring high-speed media packet processing," said Nicklas Gustafson, director of product management at Enea. "OSEck's hard real-time response, memory management support, development tools and LINX IPC services greatly simplify the design, debugging, deployment and management of secure, high-availability telecom applications distributed across multiple cores, processors and operating systems." The MSC8144 is a high-performance, TCP/IP-enabled, multicore device for network communication infrastructure devices such as 3G and WiMAX radio base stations, radio network controllers, and voice and video media gateways. Delivering a peak performance of up to 16 billion multiply-accumulate operations (16 x 16) per second, the MSC8144 integrates four high-performance SC3400 DSP subsystems based on StarCore(R) technology. Each core is equipped with a hardware memory management unit, 16 kbytes instruction cache and 32 kbytes of data cache. The MSC8144's dual RISC-based QUICC QUICC Quad Integrated Communications Controller Engine(TM) technology supports dual Gigabit Ethernet and ATM interfaces, which offload the DSP cores by handling network protocol processing. The MSC8144 also features 128 kbytes of shared L2 cache, 512 kbytes of shared M2 SRAM See static RAM. SRAM - static random-access memory , 10 Mbytes of shared M3 memory, a 200-MHz DDR DRAM controller, eight 256-bidirectional TDM (Time Division Multiplexing) A technology that transmits multiple signals simultaneously over a single transmission path. Each lower-speed signal is time sliced into one high-speed transmission. channels, a PCI (1) (Payment Card Industry) See PCI DSS. (2) (Peripheral Component Interconnect) The most widely used I/O bus (peripheral bus). interface, and a Serial RapidIO interface. "Enea's OSEck is a very powerful and feature-rich real-time operating system, tuned to meet the specific requirements of Freescale's multicore DSP-based systems," said Lynelle McKay, vice president and general manager of Freescale's Digital Systems Division. "It enables telecom and wireless OEMs to fully utilize the capabilities of the MSC8144, to build sophisticated, easy-to-use and highly robust systems based on Freescale's StarCore DSPs and PowerQUICC processors." OSEck (OSE OSE - Open Systems Environment Compact Kernel) is a DSP-optimized version of the full-featured OSE RTOS. Occupying less than 10 kbytes of memory (in a minimal configuration), OSEck delivers fully pre-emptive, event-driven, real-time response with a context switching speed of 300 nsec and a worst-case interrupt latency of 1 usec. To enhance reliability, OSEck provides full support for the MSC8144's spin locks, which prevent multiple cores from accessing the same critical data simultaneously. OSEck also provides built-in error detection and handling In television technology, Error Detection and Handling (EDH) protocol is an optional but commonly used addition to the Standard Definition-Serial Digital Interface (SDI) standard. . OSEck's message-based LINX IPC services provide the framework for establishing transparent communications between application processes running on multiple MSC8144 cores. Utilizing high-performance, zero-copy shared memory data transfers, LINX greatly simplifies distributed design, enabling applications running on multiple cores to interact as if they were running on a single core. This transparency also enhances scalability, enabling designers to add new nodes with minimal impact on existing application code. OSEck provides an ideal run-time platform for standalone MSC8144 systems. But it is also an integral part of Enea's Network Application Services Platform (NASP NASP National Association of School Psychologists NASP National Aerospace Plane NASP National Association of Safety Professionals NASP National Application Service Provider NASP National Association for Shoplifting Prevention NASP National Airport System Plan ), a telecom-in-a-box solution for developing and deploying distributed telecom applications spanning multiple processors (i.e., MSC8144, CPUs, other DSPs), operating systems (i.e., OSEck, Linux, other RTOSes) and interconnects (i.e., Gigabit Ethernet, PCI, RapidIO, shared memory). The NASP platform combines Enea's OSEck and OSE RTOSes (Enea's full-featured RTOS for 32-/64-bit CPUs) with Carrier Grade Linux A specification that defines an industrial strength operating system environment using Linux. Carrier Grade Linux (CGL) covers hardware, availability, clustering, security, serviceability and performance. , high-availability middleware (Element), a fault-tolerant database (Polyhedra), and Eclipse-based development tools. Development support for OSEck includes an RTOS-aware source-level debugger that enables programmers to debug all four MSC8144 cores simultaneously with support for run-mode and freeze-mode debug, and post-mortem analysis capabilities. OSEck also features a high-level analysis tool that enables MSC8144 designers to study system details such as OSEck process/task information, CPU CPU in full central processing unit Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit. and memory profiling, task switching, and stack and memory usage. A single-seat developer's license for OSEck running on MSC8144 cores starts at $8,000. About Enea Enea (STO:ENEA) is the leading supplier of real-time operating systems, middleware, development tools, database technology and professional services for high-availability distributed multiprocessing applications such as telecommunications infrastructure, mobile devices, medical instrumentation, and automobile control/infotainment. Enea's flagship operating system, OSE, is deployed in approximately half of the world's 3G mobile phones and base stations. Enea has over 500 employees and is listed on the Stockholm Stock Exchange The Stockholm Stock Exchange (Swedish: Stockholmsbörsen) is a stock exchange located in Stockholm, Sweden. Founded in 1863 [1] it is the primary securities exchange of the Nordic Countries. . For further information on Enea, please visit www.enea.com. |
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