Electroglas Creates Integrated Sort-Floor Solution for Inspection, Test and Analysis of Bumped Wafers.SANTA CLARA Santa Clara, city, Cuba Santa Clara (sän`tä klä`rä), city (1994 est. pop. 217,000), capital of Villa Clara prov., central Cuba. , Calif.--(BUSINESS WIRE)--July 8, 1999-- -- High-Performance Microprocessors and Chip Scale Packaging (hardware) Chip Scale Packaging - (CSP) A type of surface mount integrated circuit packaging that provides pre-speed-sorted, pre-tested and pre-packaged die without requiring special testing. An example is Motorola's Micro SMT packaging. Drive Need for Automated Inspection, Probing, and Yield Management Tools -- Electroglas Inc. (Nasdaq:EGLS EGLS Eastside German Language School (Issaquah, WA) ), a leading supplier of essential process management tools for the semiconductor industry, today unveiled its bumped wafer sort solution, the first-of-its-kind integration of automated inspection, probe, and yield management tools for bumped wafer testing and analysis. The bump wafer sort solution enables Electroglas' QuickSilver quicksilver: see mercury. (1) (QuickSilver Technology, Inc., San Jose, CA, www.qstech.com) A mobile communications company that specializes in a reconfigurable logic chip for cellphones and PDAs. See adaptive computing. (TM) automated inspection system to share bump inspection wafer maps with Electroglas' new EG4/200 and EG5/300 probers as well as its Horizon 4090 line of probers via a network. This communication flow allows the probers to skip testing die that have been identified as defective by the QuickSilver system. The QuickSilver inspection results are also transferred to Knight Technology's YieldManager(R) and Spatial Pattern Recognition (SPaR(TM)) software where they can be accessed at the wafer manufacturing level, allowing customers to identify and correct defective steps in the process. "The strategic value of the bump wafer sort solution is that Electroglas provides customers with an integrated set of process management tools that allow them to improve yields and decrease total cost of ownership," said Curt Wozniak, president and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. of Electroglas. "The wafer manufacturing, test and packaging processes continue to increase in complexity as integrated circuits Integrated circuits Miniature electronic circuits produced within and upon a single semiconductor crystal, usually silicon. Integrated circuits range in complexity from simple logic circuits and amplifiers, about 1/20 in. (1. are packed with more features. Electroglas firmly believes that to keep pace with these complexities, data gathered during each step in the process must be shared both upstream and downstream. With this announcement, we are offering our customers an integrated solution for bump wafer inspection and testing Inspection and testing Industrial activities which ensure that manufactured products, individual components, and multicomponent systems are adequate for their intended purpose. ." The Bump Wafer Sort Solution in Action Following the wafer manufacturing process, solder solder (sŏd`ər), metal alloy used in the molten state as a metallic binder. The type of solder to be used is determined by the metals to be united. Soft solders are commonly composed of lead and tin and have low melting points. Hard solders (i. or gold bumps are fabricated fab·ri·cate tr.v. fab·ri·cat·ed, fab·ri·cat·ing, fab·ri·cates 1. To make; create. 2. To construct by combining or assembling diverse, typically standardized parts: on the wafer to form the interconnection between the chip and package. This bumping process can produce bumps that are the wrong size or shape, in the wrong place or shorted together. These defective bumps can cause yield loss at the packaging step even though they test "good" at wafer probe. Defective bumps can also cause damage to expensive probe cards A probe card is an interface between an electronic test system and a semiconductor wafer. Its purpose is to provide an electrical path between the test system and the circuits on the wafer, thereby permitting the testing and validation of the circuits at the wafer level, usually and costly downtime The time during which a computer is not functioning due to hardware, operating system or application program failure. for the tester. Bump damage caused during the probing process itself can also be a source of yield loss. To address these issues, the QuickSilver inspection system visually inspects 100% of the wafer bumps using state-of-the-art TDI TDI - Transport Driver Interface scanning technology. After inspecting the wafer for visually good and bad die, QuickSilver stores its results in the SORTnet database that can be accessed by both the inspection systems and probers. Electroglas' SORTview software turns these results into a wafer map that it shares with the EG4/200 and EG5/300 prober. The wafer is moved from the QuickSilver inspection system to the prober for testing. Using the wafer inspection maps, the prober skips testing die that have already been identified by QuickSilver as defective. The benefit of allowing prober access to the inspection data is that probe card damage, due to testing bad bumps, is significantly reduced. In addition the entire process becomes more efficient because the prober does not spend time testing bad die, and the likelihood of packaging bad die is greatly reduced. In some instances it may be valuable for the wafer to be re-inspected on the QuickSilver system after probe to check for bump damage. In this case the original inspection map from the QuickSilver system can be combined with the test results map generated on the prober to generate a final composite map of good and bad die. Inspection results from QuickSilver can also be accessed for analysis by Knights YieldManager and SPaR software systems. YieldManager is a yield management system that helps engineers quickly determine sources of semiconductor yield loss. SPaR allows for user-defined classification of defect wafer maps. By integrating the QuickSilver data into these systems, customers can feed data both upstream (to the fab) and downstream (to the packaging and assembly area) to help optimize the entire process. The tools can be used to help correct defects, improving yield and lowering cost of ownership. "Industry forecasts predict that more than 20 percent of all ICs will use bump technologies within the next five years, and for high-end applications, such as microprocessors, it is expected to be even higher," said Joe Savarese, vice president of business development and general manager of Electroglas' Inspection Products Division. "This shift in the industry is being driven by products with increasing space restrictions and electrical performance requirements, such as those in the portable applications market. The bumping process brings with it a whole new set of demands, a subset of which Electroglas is successfully addressing by offering this complete bump sort-floor solution." Putting the Pieces Together Electroglas' bump wafer solution is a complete package for managing the bump sort floor. Driven by customer demand, Electroglas' inspection system, probers, networking software Please [ improve this article] by rewriting this article in an . and yield management software all use a common format for sharing data over a network. QuickSilver Automated Inspection Systems -- The QuickSilver line of automated inspection systems are designed to deliver a sort-floor cost breakthrough for semiconductor fabs See fab. . When used for bump inspection, a single automated QuickSilver system can achieve the same throughput as up to six manually operated optical inspection stations -- with a total cost of ownership savings of up to 40 percent. QuickSilver systems employ the same time delay integration (TDI) imaging technology as more expensive optical defect detection systems used in the wafer fabrication Wafer Fabrication is a procedure composed of many repeated sequential processes to produce complete electrical or photonic circuits. Examples include production of radio frequency (RF) amplifiers, LEDs, optical computer components, and CPUs for computers. process, but with resolution and high throughput consistent with the needs of sort-floor inspection at one fourth the cost. EG4/200, EG5/300 and Horizon 4090u Prober Systems -- Electroglas' prober offerings include the Horizon 4090u, and the new EG4/200 and EG5/300, to be introduced at SEMICON SEMICON Semiconductors Equipment and Material International Conference West '99. All are highly advanced systems that incorporate sophisticated motion control, software, networking, and vision technology to accurately and rapidly probe next-generation devices. SORTnet -- SORTnet products deliver the ultimate in test area networked communications, management, and control. Utilizing high-speed, industry recognized standards, SORTnet provides the enabling technology for improving productivity and profitability. SORTview -- SORTview, a 32-bit, Windows-based, easy-to-use software application is used to analyze process data in real-time to help maximize productivity. SORTview can display wafer maps and status information, generate reports from a special wafer SORT database, and define user-programmable events and actions. YieldManager -- YieldManager is a customizable, hardware-independent yield management software system that enables engineers to collect, correlate, analyze and graphically display or report essential fab data and determine significant sources of semiconductor yield loss quickly. YieldManager is an open-architecture, client/server system using the TCP/IP TCP/IP in full Transmission Control Protocol/Internet Protocol Standard Internet communications protocols that allow digital computers to communicate over long distances. protocol and EtherNet connections to enable interconnectivity and enterprise-wide computing throughout the fab and among manufacturing facilities. YieldManager's open architecture enables easy connectivity with various fab equipment from multiple suppliers and worldwide sharing of yield data among a manufacturer's wafer fabs. SPaR -- SPaR takes the analysis of defect wafer maps to new levels. Based on algorithms developed at Oak Ridge National Laboratories Oak Ridge National Laboratory (ORNL) is a multiprogram science and technology national laboratory managed for the United States Department of Energy by UT-Battelle, LLC. ORNL is located in Oak Ridge, Tennessee, near Knoxville. , the SPaR product effectively groups defects into signatures that can then be classified into process events. These classifications are user-defined and can be built up over time as new sources are identified. SPaR runs on Windows NT (Windows New Technology) A 32-bit operating system from Microsoft for Intel x86 CPUs. NT is the core technology in Windows 2000 and Windows XP (see Windows). Available in separate client and server versions, it includes built-in networking and preemptive multitasking. , in either a stand-alone or client-server architecture client-server architecture Architecture of a computer network in which many clients (remote processors) request and receive service from a centralized server (host computer). . It can process wafer maps automatically, and users can have automatic sampling files generated based on the results. Availability and Support A demonstration of the bumped wafer sort solution will be at SEMICON West '99 at Electroglas' booth in San Jose San Jose, city, United States San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850. no. 11221. For additional information, please call 408/727-6500 or e-mail info@electroglas.com. About Electroglas Inc. Electroglas delivers essential tools for process management designed to enhance semiconductor companies' profitability. The company's wafer probers The introduction to this article provides insufficient context for those unfamiliar with the subject matter. Please help [ improve the introduction] to meet Wikipedia's layout standards. You can discuss the issue on the talk page. , inspection systems and software solutions serve as data collection, management and analysis tools that semiconductor manufacturers depend on to improve their productivity and process control by optimizing sort-floor efficiency. Electroglas has been a leading supplier of wafer probers for over 35 years and has an installed base of more than 10,000 systems. The company's stock trades on the NASDAQ National Market under the symbol "EGLS." The company's website is located at www.electroglas.com. QuickSilver and SPaR are trademarks, and YieldManager is a registered trademark of Knights Technology, a Division of Electroglas Inc. Other product names mentioned in this document are trademarks of their respective holders. |
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