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Articles 1-100 out of 100 article(s) Title Author Type Date Words Google partners with utilities for its Power Meter. Brief article May 20, 2009 205 TOSHIBA TO DEPLOY BLAST FUSION IN WORLDWIDE DESIGN CENTERS. Dec 1, 2001 606 Rhapsody 4.0. (Management News). Brief Article Oct 1, 2001 173 AGILENT'S NETWORKING AND COMPUTING GROUP INCORPORATES VERPLEX FORMAL VERIFICATION SOLUTION IN DESIGN FLOW. Jun 11, 2001 281 Common Emulation Interface Announced; Common Interface A Major Breakthrough For The Benefit Of Users. Feb 12, 2001 657 Xilinx Makes $1 Million Virtex-E FPGA Donation to Universities Through the Celoxica University Programme. Feb 12, 2001 873 Clare's Next Generation All-Silicon Data Access Arrangement With On-Chip Isolation Now Available. Feb 12, 2001 743 Willamette HDL Releases SystemC-Based Software Product; Language Rule Checker Designed for Hardware Design Analysis, Debug. Feb 12, 2001 652 Cadence Advances Its PCB Design Environment; Cutting-Edge Technology Support and Design Reuse Deliver Increased Productivity. Feb 12, 2001 1351 IKOS Systems Donates Key Technology for Common Emulation Application Programming Interface -- SCE-API --. Feb 12, 2001 530 Atmel Introduces 4-Mbit Serial EEPROMs for Configuration of Million Gate FPGAs and Programmable SoCS. Feb 6, 2001 586 Philips Semiconductors Standardizes on Denali for Memory Design Methodology. Feb 6, 2001 598 Circuit Cellar and Atmel Launch The 'Design Logic 2001' Design Contest. Feb 2, 2001 538 Axis Strengthens Operations in Japan, Opens Office; Leading Japanese Companies Purchase Axis' Verification Solution; Kuniyoshi Hirayama to Head Axis Japan in Tokyo, Japan. Feb 1, 2001 601 Simpod's DeskPOD Adds Support for Processor Cores from MIPS Technologies. Jan 31, 2001 600 STMicroelectronics Introduces Free EDA Tool That Automates PSD Logic Design. Jan 31, 2001 1129 Toshiba Adds 64-Bit MIPS-based Embedded Microprocessor With Integrated PCI Interface. Jan 30, 2001 776 Tracewell Packaging System for Compact PCI Bus Supports H.110 Telecom and Industrial Applications. Jan 23, 2001 370 IBM and LSI Logic Announce Technology Licensing Agreement; ASIC Leaders to Broaden Use of ZSP DSP Technology in Custom Chips. Jan 22, 2001 734 Co-Design Automation Forms SUPERLOG Superuser Forum as Component of Standardization Process; Accelerating Momentum From Verilog Community Drives Language Interaction Across Industry. Jan 22, 2001 697 Altera and Alcatel Team Up to Deliver Gigabit Ethernet IP Core. Jan 22, 2001 802 Altera Announces New IP Cores for the Communications Market. Jan 22, 2001 609 STMicroelectronics Announces Development Platform for ST120 Digital Signal Processor Core. Jan 22, 2001 673 Innoveda's Visual Elite Integrates HDL and System-Level Design in One Tool; Provides Support for C/C++, VHDL and Verilog Modeling. Jan 22, 2001 822 Get2Chip Supports SUPERLOG for Next-Generation SOC Design Tools; Architectural Synthesis Leader Takes SUPERLOG Into Silicon. Jan 22, 2001 990 Cadence SP&R Solution Used By Crest Microsystems, Inc. For Successful Tapeout of Unique Network ASIC. Jan 17, 2001 805 Cadence SP&R Design Tools Used by Fujitsu to Tape-Out 1.6 Million Gate, 266 MHz Embedded Microprocessor. Jan 17, 2001 722 GenRad Introduces GR Pilot LX Flying Prober Test System; Advanced Capabilities, Large Board Test Area are Featured. Jan 16, 2001 865 BOPS Announces Industry's First SOC in a Box; BOPS' VoiceRay CGW Enables Highest Density Carrier-Class VoIP SOC Solution on G.729a and G.711. Jan 15, 2001 1116 InTime's DesignWarrior Improves Chip Performance, Cuts Design Time. Jan 15, 2001 929 Exemplar Logic and Xilinx Cement Technology Exchange Partnership. Jan 15, 2001 652 Synopsys' DFT Compiler Receives Best in Test Award From Test & Measurement World Magazine. Jan 15, 2001 540 Atmel Releases Free WinCUPL Design Software. Jan 12, 2001 464 Insight Electronics' New Virtex-E Development Kit Speeds Development Cycle for FPGA Designers; Provides Low-Cost, Easy-to-Use Platform for Prototyping, Verifying Designs. Jan 11, 2001 435 Atmel-Protel Partner on Design Software. Jan 11, 2001 705 C Level Design Acquires Transmodeling; Opens New Development Facility in Portland, Ore. Jan 8, 2001 499 Gambit's MIMIC Cuts Avaya Communication's Demo Costs Allows Demos of Avaya's CajunView From Sales Peoples' Laptops. Jan 8, 2001 649 GATESCOPE INTEGRATED INTO FLEXSTREAM DESIGN SYSTEM. Jan 1, 2001 719 Semtech Expands Its Power Management Portfolio With a New Family of Linear FET Controllers for Computers, Communications and Industrial Applications. Dec 20, 2000 658 Synplicity's Certify Product Makes EDN Magazine's `Hot 100 Products' Honor Roll. Dec 19, 2000 629 New 3D Stacked DSP/Memory Device Simplifies System Design, Adds Upgrade Flexibility and Cuts Footprint More Than 50 Percent. Dec 18, 2000 744 Atmel Announces North America Logic Seminar Series Q1 2001. Dec 18, 2000 590 Mentor Graphics Delivers Broad Portfolio of Twenty Inventra IP Cores for Altera Programmable Logic Devices. Dec 18, 2000 896 Modular System-on-Chip Platform uses Open Source 32-bit CPU Core and Open Source Embedded Linux Software. Dec 15, 2000 697 GV & Associates Releases Emulation Board for The Xilinx XtremeDSP Solution; New Board Interfaces to MATLAB, Simulink and Xilinx Integrated Logic Analyzer Tools. Dec 6, 2000 653 FormFactor's Wafer-Level Packaging Process Licensed to Infineon; Europe's Leading IC Manufacturer Also Invests $5 Million in FormFactor. Dec 5, 2000 631 Rambus and Zuken Jointly Develop PCB Design System for Direct RDRAM. Dec 5, 2000 572 Synopsys Advances Physical Synthesis With New Physical Compiler 2.0. Dec 5, 2000 1020 eSilicon Bridges Gap Between Chip Design and Manufacturing with New Business Model. Dec 4, 2000 2215 Synplicity and Xilinx Address Broadband Communications Market With DSP Design Flow; Synplicity Provides DSP-Friendly Synthesis for Xilinx DSP Design. Dec 4, 2000 830 Quickturn and Xilinx Partner to Expand Support for SOC Design Verification and Design Reuse. Dec 4, 2000 972 Mentor Graphics and Xilinx Announce Support of Xilinx DSP Algorithms Through FPGA Advantage and LeonardoSpectrum. Dec 4, 2000 738 Agilent Technologies Licenses ARM Cores for Integration Into Communications and Imaging ASIC Products. Nov 28, 2000 699 Xilinx IP Solutions Division Standardizes on Model Technology's Simulation Tool, ModelSim. Nov 28, 2000 492 LTX Announces New Fusion Partner Program Members; Program Members Committed to Fusion's Single Platform Approach. Nov 28, 2000 982 VERPLEX SHIPS FULL-CHIP FORMAL RTL DESIGN VERIFICATION TOOL THAT CUTS LEARNING CURVE. Brief Article Nov 27, 2000 111 Altera's Patented Redundancy Technology Dramatically Increases Yields on High-Density APEX 20KE Devices. Nov 27, 2000 659 Moscape Announces Integration of GateScope Into LSI Logic's FlexStream Design System for Noise Signoff. Nov 27, 2000 744 Infineon Introduces New 16-bit Microcontroller Core. Nov 21, 2000 802 Xilinx Announces XPower Power Analysis Software for FPGA Design. Nov 21, 2000 425 Xilinx Announces DSP Algorithms, Tools and Features for Virtex-II Architecture; Part of Xilinx XtremeDSP Initiative to Deliver 600 Billion MACs Per Second DSP Performance. Nov 21, 2000 925 Xicor Adds LabVIEW Tool Support for Mixed Signal Product Family; LabVIEW Supports High-Volume Device Programming for Manufacturing Applications. Nov 20, 2000 787 Verplex Places Verification Library in Public Domain; Enables Detailed Debugging with Simulation, Effortless Path to Formal RTL Design Verification. Nov 20, 2000 624 Verplex Ships Full-Chip Formal RTL Design Verification Tool That Eliminates Learning Curve. Nov 20, 2000 715 Altera Announces First PLD Family Using All-Layer Copper Interconnect. Nov 20, 2000 1161 Cypress Expands IP Oasis Program by Partnering With Eureka Technology; Eureka Technology IP Cores Will be Optimized for Use With Warp Design Tool. Nov 20, 2000 1033 ANT Develops Port of Fresco Browser To StrongARM/VxWorks Reference Platform. Nov 20, 2000 961 Clear Logic's Robust Simulation Models Provide Comprehensive Timing Data for FPGA-prototyped ASIC Designs. Nov 20, 2000 1243 Low Power Transceiver IC Solution; New TDK Semiconductor Transceiver IC Ideal for Use as SONET Interface to Fiber Optics Modules. Nov 20, 2000 396 EPI Introduces New Software Toolkit; ARM Developer Suite is Now Available for Immediate Delivery. Nov 20, 2000 507 Altera Announces QuickStart Program to Assist Developers of IEEE 1532 Tools. Nov 17, 2000 535 Cadence Wireless Design Solution Selected By LinCom Wireless; Design Solution Provides Integrated System-to-ASIC Flow for 802.11a. Nov 15, 2000 724 Triscend Adopts Sequence Interconnect Modeling for Configurable System-On-Chip Design; Columbus 3-D RLC Extraction Tools Chosen for Accuracy, Ease of Use. Nov 13, 2000 590 0-In Enhances Verification for Large SOC Devices; Latest Release Supports Broader Range of Designs. Nov 13, 2000 600 Synplicity Enhances Synplify Pro Product to Overcome IP Integration Barriers. Nov 13, 2000 918 International Rectifier Announces Motor Drive Design Breakthrough. Nov 10, 2000 525 Wind River and Xilinx to Create System Software Basis for Platform FPGA Initiative. Nov 7, 2000 691 Formation Chooses Surf's Software and Design Solutions for Advanced In-Flight Systems. Nov 7, 2000 595 C Level Design Joins the Cadence Connections Program; System Compiler and CSim Integrated with Cadence Verilog-XL and Ambit BuildGates for High Performance C/C++ Design Methodology. Nov 6, 2000 444 Microchip Technology Introduces $99 In-Circuit Debugger. Nov 6, 2000 565 Cypress Samples World's Largest CPLDs. Nov 6, 2000 1002 Synopsys Releases FPGA Compiler II and FPGA Express Version 3.5. Nov 6, 2000 802 The MathWorks and Xilinx to Address Hardware-Software Co-Design for High-Performance DSP for Platform FPGA Initiative. Nov 6, 2000 741 Xilinx Aligns with Industry leaders to announce Platform FPGA initiative; Xilinx teams with IBM, Mentor Graphics, Synopsys, The MathWorks, Wind River Systems. Nov 6, 2000 1193 Synopsys and Xilinx Collaborate On System Level Design for FPGAs; Leaders in Programmable Logic and System Level Design Tools Team Up to Automate C/C++ Based Design Flow. Nov 6, 2000 774 Small-scale design. Nov 1, 2000 49 Quickturn Selected by Sigma Designs for Emulation of Next-Generation Chips and Boards. Nov 1, 2000 762 Micron Technology and Denali Announce the Availability of Simulation Models for SyncFlash Memory. Oct 31, 2000 539 NEW RULE SETS FOR LEDA CHECKERS ACCELERATE AND DELIVER. Oct 30, 2000 221 Cadence Synthesis Tools Triple Performance and Offer Datapath and Low-power Options. Oct 30, 2000 1158 Axis Improves Verification Productivity For TI's ADSL DSP Designs. Oct 30, 2000 406 Averant Announces Expansion into European Marketplace. Oct 30, 2000 580 Atmel Announces USB to UART Bridge Controller. Oct 25, 2000 495 Cadence Assura Solution Targets Chip Designers in High-Growth Communications Market Segments. Oct 23, 2000 915 New Analog Output PCI Boards Offer High Resolution, Remote Sensing At Economical Price. Oct 23, 2000 506 Wind River, Xilinx Partner To Deliver Innovative Field Upgradable Embedded Systems for Smart Devices. Oct 23, 2000 872 Real Intent Selects Spinnaker Systems; Experienced Firm Selected To Represent Electronic Design Verification Products in Japan. Oct 23, 2000 329 ARC Cores Selects Synopsys High-Level Design Tools for SoC Evaluation Platform. Oct 23, 2000 561 ALTERA'S QUARTUS SOFTWARE BOOSTS PERFORMANCE BY MORE THAN 30 PERCENT. Product Announcement Oct 16, 2000 453 [0] Xilinx and ARC Cores Announce Alliance for Configurable Processor Cores and World Wide Network of Design Centers. Jul 3, 2000 891