Detailed T-1 testing.The Bit Error Tester, PN 701182-1, is a standalone device designed to provide unframed, high-speed, serial binary output ranging from T-1 to STM-1 rates. Outputs can be encoded with applicable zero-suppression techniques. Signal levels include differential and single-ended AMI, CMI (Computer-Managed Instruction) Using computers to organize and manage an instructional program for students. It helps create test materials, tracks the results and monitors student progress. , ECL (Emitter-Coupled Logic) A digital circuit composed of bipolar transistors in which the emitter ends are wired together. ECL gates switch faster than TTL gates, but consume more power. See TTL, I2L and bipolar. 1. , PECL PECL PEAR (PHP Extension and Application Repository) Extended Code Language PECL Principles of European Contract Law PECL Positive Emitter Coupled Logic PECL Pseudo-Emitter Coupled Logic PECL Positive-Referenced Emitter Coupled Logic and RS-422, and LVDS (Low Voltage Differential Signaling) A transmission method for sending digital information. LVDS sends data over data high and data low lines rather than data and ground. levels for copper interface and STM-1 (OC3) fiber-optic interface. All electrical I/O is through rear panel concentric twinaxial connectors or industry standard BNC connectors. The SFP I/O can be electrical, if an Infiniband or Fibre Channel device is installed. NRZ interfaces are all differential pairs. Fiber I/O is through LC connectors and a SFP transceiver.--Technisys www.rsleads.com/503cn-310 [ILLUSTRATION OMITTED] |
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