Denali to Supply DDR Memory Solutions for HP Imaging and Printing Product Designs.Business Editors/High-Tech Writers PALO ALTO, Calif.--(BUSINESS WIRE)--Aug. 27, 2003 Denali Software, Inc., the leading provider of semiconductor intellectual property (SIP) and electronic design automation (EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. ) tools for chip interface design and verification, today announced an agreement with HP (NYSE NYSE See: New York Stock Exchange :HPQ HPQ Hewlett-Packard Corporation (NYSE) HPQ High Priority Queue ) to provide configurable memory controller cores and memory modeling solutions for the design and verification of chips used in HP's imaging and printing products. Denali now provides HP design teams with Databahn(TM) memory controller cores, which are used in HP designed chips to interface with double-data-rate (DDR (Double Data Rate) Refers to an SDRAM memory chip that increases performance by doubling the effective data rate of the frontside bus. For more details, see SDRAM. DDR - Double Data Rate Random Access Memory ) memory devices. The cores are configurable and programmable to deliver optimal memory data transfers to match the requirements for various end product designs from HP. The deal also provides HP with Denali's MMAV(TM) product for modeling and simulating the interactions between the HP chips and external memory devices for design verification and performance analysis. "HP is the commanding leader in a very competitive market -- their ability to consistently deliver the right mix of technology and value is very impressive," said Mark Gogolewski, CTO (Chief Technical Officer) The executive responsible for the technical direction of an organization. See CIO and salary survey. , Denali Software, Inc. "Memory systems play a critical role in these applications. We've supported HP with memory controllers and memory modeling products for several years. Working with HP in this broader scope underscores our commitment to delivering the highest quality solutions for memory system design and verification." "Denali has demonstrated expertise in their ability to deliver high-quality IP and EDA tools for memory system development," said Jim Nottingham, section manager, HP Imaging and Printing group. "We've gone to silicon with a number of chips that use the Databahn memory controllers for interfacing with DDR memory devices. These solutions from Denali speed our development efforts and allow us to focus on innovative designs for imaging and printing products." About Databahn Memory Controller Cores Licensed by over 35 leading semiconductor and system companies, Databahn is the industry leading memory controller IP solution. Databahn memory controller cores are configurable for a wide range of performance and power requirements, as well as ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. interfaces. To ensure compatibility with all the latest high-speed memory technologies, the configuration process is tightly integrated with Denali's database of memory component specifications, including all the latest DDRII-SDRAM, DDR-SDRAM DDR-SDRAM - Double Data Rate Random Access Memory , FCRAM FCRAM Fast Cycle Random Access Memory FCRAM Fast Cycle Ram , RLDRAM (storage) RLDRAM - (Reduced Latency DRAM) A kind of dynamic random access memory. RLDRAM comes in "common IO" and "separate IO" configurations. It supports broadside addressing. It is typically used in networking gear and set-top boxes that require high bandwidth memory. , and DDR/QDR-SRAM devices. Deliverables include: RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; and synthesis scripts, verification testbench, static timing analysis (STA) scripts, programmable register settings, and documentation. The silicon-proven Databahn IP is library independent and covers solutions from .18-micron to .08-micron technologies, and DRAM device frequencies from 100-400MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. (200-800MHz data rate). About Denali Denali Software Inc. is the world's leading provider of EDA tools and Semiconductor Intellectual Property (SIP) solutions for chip interface design, integration, and verification. PureSpec is the industry leading solution for verifying compliance and interoperability for PCI Express designs. Denali's Databahn memory controller cores are licensed for use in over 80 chips, and provide designers with the highest quality solution for interfacing with all new and emerging high-performance memory technologies. Denali's MMAV product is the de facto industry standard for modeling and simulating memory during all phases of design and verification. Memory selection, memory controller configuration, and memory system performance analysis are supported through Denali's online infrastructure at eMemory.com. More than 400 companies worldwide use Denali's tools, technology, and services to design and verify complex chip interfaces for communication, consumer, and computer products. For more information, please visit Denali at www.denali.com or contact Denali directly at: 650-461-7200, or email: info@denali.com. The Denali logo, Databahn, eMemory, MMAV, and PureSpec are trademarks of Denali Software, Inc. PCI Express is a trademark of PCI-SIG. All other trademarks are the property of their respective owners. |
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