Denali Software and Open Core Protocol International Partnership Announce the Availability of OCP Compliant Databahn Memory Controllers.

Business Editors/High-Tech Writers

PORTLAND, Ore.--(BUSINESS WIRE)--May 28, 2003

Denali Software, Inc., the leading provider of semiconductor intellectual property (SIP) and electronic design automation (EDA) tools for chip interface design and verification, and Open Core Protocol International Partnership (OCP-IP) announced the availability of OCP compliant Databahn(TM) memory controller cores. The OCP compliant cores allow designers to quickly and easily integrate Databahn cores with other third party IP using the OCP standard. Denali's Databahn cores are the latest enhancement to a robust thriving infrastructure around OCP, smoothing the path towards effective design re-use.

Memory systems are now the primary bottleneck to the flow of data in system-on-chip designs. Increasing clock speeds, new memory architectures, vendor-specific memory features and timing, and high-speed I/O effects are just some of the critical issues that must be addressed when designing a memory system. The new Databahn cores provide a highly configurable, OCP compliant solution that promotes design re-use without re-work.

"Denali is proud to offer OCP compliant Databahn memory control cores," said Kevin Silver, vice president of marketing for Denali Software Inc. "Our OCP compliant Databahn cores help further development of infrastructure around this industry standard for connectivity, leading the way toward effective design re-use."

"Denali's Databahn cores have already been proven in real-world design and are part of the Toshiba America Electronic Components, Inc. (TAEC) SoCMosaic(TM) custom chip soft IP platform. The soft IP platform-based design approach can reduce time-to-market for a custom system-on-a-chip (SOC) to as little as six months," said Richard Tobias, vice president of the ASIC and Foundry business unit for TAEC.

"It is especially satisfying to see prominent providers and users collaborating in adoption of such leading edge products," said Ian Mackintosh, President of OCP-IP. "The industry needs a complete socket standard that everyone can use, no matter what their on-chip architecture is, or whose processor cores they're using. The use of OCP by these leading companies illustrates that OCP is that standard."

About Denali Software, Inc.

Denali Software Inc. is the world's leading provider of EDA tools and Semiconductor Intellectual Property (SIP) solutions for chip interface design, integration, and verification. PureSpec is the most robust interface verification solution for PCI Express architectures. Denali's Databahn product provides designers with the highest quality solution for producing memory controller cores for all of the new and emerging DRAM memory technologies. Denali's MMAV product is the de facto industry standard for modeling and simulating memory during all phases of design and verification. Memory selection, memory controller configuration, and memory system performance analysis are supported through Denali's online infrastructure at eMemory.com. More than 400 companies worldwide use Denali's tools, technology, and services to design and verify complex chip interfaces for communication, consumer, and computer products. For more information, please visit Denali at www.denali.com or contact Denali directly at: 650/461-7200, or email: [e-mail].

About OCP-IP

The OCP International Partnership Association, Inc. (OCP-IP) was announced in December 2001 to promote and support the open core protocol (OCP) as the complete socket standard that ensures rapid creation and integration of interoperable virtual components. OCP-IP's Governing Steering Committee participants are: Nokia (NYSE:NOK), Texas Instruments (NYSE:TXN), ST Microelectronics (NYSE:STM), Flextronics, (Nasdaq:FLEX), United Microelectronics Corporation (NYSE:UMC), and Sonics, the inventor of OCP. OCP-IP is a non-profit corporation delivering the first fully supported, openly licensed core-centric protocol that comprehensively fulfills system-level integration requirements. The OCP facilitates IP core reusability and reduces design time and risk, along with manufacturing costs for SOC designs. For additional background and membership information, visit www.OCPIP.org.

About TAEC

Combining quality and flexibility with design engineering expertise, TAEC brings a breadth of advanced, next-generation technologies to its customers. This broad offering includes semiconductors, flash memory-based storage solutions, optical communication devices, displays and rechargeable batteries for the computing, wireless, networking, automotive and digital consumer markets.

TAEC is an independent operating company owned by Toshiba America, Inc., a subsidiary of Toshiba, the second largest semiconductor company worldwide in terms of global sales for the year 2001 according to Gartner/Dataquest's Worldwide Semiconductor Market Share Ranking. Toshiba is a world leader in high-technology products with more than 300 major subsidiaries and affiliates worldwide. For additional company and product information, please visit TAEC's website at chips.toshiba.com. For technical inquiries, please e-mail [e-mail]. Information about SoCMosaic(TM) can be found at www.SoCMosaic.Toshiba.com.