Denali Named to IBM Blue Logic IP Collaboration Program; Databahn Memory Controller Cores Proven in IBM ASIC Methodology.

Business Editors/High-Tech Writers

PALO ALTO, Calif.--(BUSINESS WIRE)--Oct. 18, 2002

Denali Software, the leading provider of memory system intellectual property (IP) and verification solutions, today announced that it has become a member of the IBM Blue Logic IP Collaboration Program. Denali's Databahn(TM) cores are the first memory controllers to be made available in the program.

Established in March 2002, the Blue Logic IP Collaboration Program fosters close working relationships between IBM (NYSE:IBM) and select third-party providers to facilitate customer utilization of IP cores.

Denali's Databahn memory controllers are proven in IBM Microelectronics' leading ASIC manufacturing technologies; the configurable Databahn IP cores are now offered for integration into IBM ASICs. The Databahn cores offer ASIC designers a fully configurable memory controller solution for high-speed DRAM interfaces, including DDR-SDRAM, DDRII, RLDRAM, and FCRAM.

"IBM is providing designers with a portfolio of silicon-proven cores that can be leveraged seamlessly in the IBM ASIC flow," said Kevin Silver, vice president of marketing for Denali Software. "Databahn is a proven memory controller solution that is configurable for high-performance in a wide variety of applications. The availability of Databahn through this program gives IBM ASIC customers the ability to streamline complex memory interface design issues and shave weeks off their design schedule."

"The IBM Blue Logic IP Collaboration Program provides our ASIC customers with access to a broad library of IP cores for a wide range of design applications," said Tom Reeves, vice president, ASIC product group, IBM Microelectronics. "Denali's domain expertise in memory, combined with broad configurability options, makes the Databahn memory controller cores a good fit for the IBM IP portfolio."

About Databahn

Databahn high-performance memory controller cores are fully configurable to match the exact ASIC application in order to achieve 100% bus utilization. Customization is supported by an online infrastructure at Denali's eMemory.com site where a browser-based GUI enables fast efficient configuration of various performance and interface options. To ensure compatibility with all the latest high-speed DRAM memory technologies, the configuration process is tightly integrated with a database of more than 4000 memory components, including the latest DDRII-SDRAM, DDR-SDRAM, FCRAM, and RLDRAM devices. The configuration process creates a machine readable specification file that drives the generation of synthesizable Verilog RTL for the core, which can then be simulated online to validate performance. Once the performance targets are met, other deliverables are generated, including verification routines, synthesis scripts, static timing analysis scripts, and documentation. The Databahn IP is library independent and covers solutions from .18u to .11u technologies, and DRAM device frequencies from 100-250MHz (200-500MHz data rate).

About Denali

Denali Software Inc. is the world's largest provider of comprehensive solutions for memory system selection, design, integration, and verification. Denali's Databahn(TM) product provides designers with the highest quality solution for producing application specific memory controller cores for all of new and emerging DRAM memory technologies. Denali's MMAV(TM) product is the de facto industry standard for modeling and simulating memory during all phases of design and verification. Memory selection, memory controller configuration, and memory system performance analysis are supported through its online infrastructure at eMemory.com. More than 400 companies worldwide use Denali's tools, technology, and services to efficiently integrate new memory technologies into complex system designs for communication, consumer, and computer products. For more information, visit Denali at www.denali.com, call [phone], or email [e-mail].