Cypress and MorethanIP Partner to Provide IP/Cores for OC-48/STM-16 and OC-192/STM-64 Communication Interfaces.Business Editors/High-Tech Writers SAN JOSE San Jose, city, United States San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850. , Calif.--(BUSINESS WIRE)--Aug. 31, 2001 POS (1) See point of sale and packet over SONET. (2) "Parent over shoulder." See digispeak. POS - point of sale PHY See physical layer and physical. L3/Flexbus-4 IP/Cores Support Cypress Programmable PHYs For High-Speed Network Infrastructure Linecards Cypress Semiconductor Cypress Semiconductor is a semiconductor design and manufacturing company. It began operations in 1982 and listed publicly in 1986. Two years later, the company shifted over to the New York Stock Exchange under the symbol, (NYSE: CY). (NYSE NYSE See: New York Stock Exchange :CY) and MorethanIP (Munich, Germany) today announced a partnership to make available MorethanIP's Intellectual Property/cores (IP/cores) for the Cypress Programmable Serial Interface(TM) (PSI(TM)) family of programmable physical layer (PHY) devices and the Delta39K(TM) family of complex programmable logic devices (CPLDs). The inclusion of MorethanIP in the IP Oasis partnership program reinforces Cypress's strategy of providing leading-edge solutions for its data communications data communications, application of telecommunications technology to the problem of transmitting data, especially to, from, or between computers. In popular usage, it is said that data communications make it possible for one computer to "talk" with another. customers. The IP/cores simplify IP integration into broadband optical, SONET/SDH system designs, providing flexibility and shortening design cycle time. The IP/cores will be available as netlists or RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; source code and will be optimized and pre-fit for both the PSI and Delta39K device families. "The IP/cores from MorethanIP enable Cypress to provide comprehensive communications interface solutions for the rapidly-growing OC-48/STM-16 and OC-192/STM-64 data communications markets as designers combine PSI PHYs or Delta39K CPLDs with our framers, network search engines (NSEs), network coprocessors, and datapath switching elements (DSEs)," said Chris Norris, vice president of Cypress's Data Communications Division. "MorethanIP's IP/cores complement Cypress's programmable platforms," said Deepak Sharma, senior IP and EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. marketing manager of Cypress's Data Communications Division. "The programmability allows integration of custom IP with the POS-PHY L3/Flexbus-4 IP/cores to enable standard communications interfaces to processors, framers and other chips on the board." "Partnering with Cypress allows us to offer hardware-verified system solutions to designers through leading-edge products such as the PSI and Delta39K families," said Francois Balay, MorethanIP's director of business development. "This is an opportunity for us to highlight our extensive experience in hardware and software development of high-speed solutions for data and telecommunications applications." The IP/Cores -- The Flexbus 4 enables packet-over-SONET/SDH (POS) networking routers to send native IP packets directly over SONET/SDH frames. It enables the transfer of data between a physical-layer framer chip and a link layer processor at 10 Gbps. It is compliant with Optical Internetworking Forum specification OIF-SPI4-01.0. Both Flexbus 4 and SPI-4 Phase 1 transfer 64 bits per clock cycle with out-of-band addressing. Flexbus 4 has an optional 16-bit path for OC-48/STM-16 applications. -- The POS-PHY Level 3 (PL3) interface defines operations between PHYs (such as ATM, POS and Gigabit Ethernet framers) and link layer devices (such as ATM, Internet Protocol and Gigabit Ethernet forwarding devices) at the OC-48/STM-16 aggregate line rate. The PL3 interface is used in Internet Protocol routers, switches, link layer interfaces to processors, and traffic management devices. The MorethanIP PL3 IP/Core is compliant with the POS-PHY L3 of the Saturn Development Group, ATM Forum specification AF-PHY-0143.000 and Optical Internetworking Forum specification OIF2000.008.3. IP Oasis The IP Oasis partnership program was designed to be the primary portal for data communications solutions built with IP/cores and Cypress programmable logic devices, such as the Delta39K family of CPLDs and the PSI(TM) family of programmable PHYs. The IP/cores are targeted at a variety of applications, including backplanes, line cards, switches, routers, 3G base stations, VoIP gateways, servers, mass storage equipment, interconnecting workstations, and video-transmission equipment. The IP/cores are available as netlists optimized for use with Cypress's Warp development environment. IP Oasis, located at http://www.cypress.com/pld/ipoasis, allows users to view and select pre-qualified intellectual property cores and directs visitors to the IP vendor's sites for licenses and downloads. Licensing and Availability The MorethanIP IP/cores for PSI devices and Delta39K CPLDs will be available in Q4'01 with licenses starting at $12,000 for netlists and $18,000 for VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. source code. For more information on MorethanIP products please email info@morethanip.com or visit http://www.morethanip.com. For more information on Cypress CPLDs and PSI devices, customers can call 800/858-1810 in the U.S. or 408/943-2600, or visit http://www.cypress.com/pld and http://www.cypress.com/psi. About Cypress Cypress Semiconductor is "Driving the Communications Revolution"(TM) by providing high-performance integrated circuit integrated circuit (IC), electronic circuit built on a semiconductor substrate, usually one of single-crystal silicon. The circuit, often called a chip, is packaged in a hermetically sealed case or a nonhermetic plastic capsule, with leads extending from it for solutions to fast-growing markets, including data communications, telecommunications, computation, consumer products, and industrial control. With a focus on emerging communications applications, Cypress's product portfolios include high-speed physical layer devices (PHYs), network search engines (NSEs), network coprocessors, networking-optimized and micropower static RAMs; high-bandwidth multi-port and FIFO (First In First Out) A storage method that retrieves the item stored for the longest time. Contrast with LIFO. See traffic engineering methods. FIFO - first-in first-out memories; high-density programmable logic devices; timing technology for PCs and other digital systems; and controllers for Universal Serial Bus See USB. (hardware, standard) Universal Serial Bus - (USB) An external peripheral interface standard for communication between a computer and external peripherals over an inexpensive cable using biserial transmission. (USB USB in full Universal Serial Bus Type of serial bus that allows peripheral devices (disks, modems, printers, digitizers, data gloves, etc.) to be easily connected to a computer. ). More information about Cypress is accessible electronically on the company's Web site at http://www.cypress.com. "Safe Harbor Safe Harbor 1. A legal provision to reduce or eliminate liability as long as good faith is demonstrated. 2. A form of shark repellent implemented by a target company acquiring a business that is so poorly regulated that the target itself is less attractive. " Statement under the Private Securities Litigation Reform Act The Private Securities Litigation Reform Act of 1995 (PSLRA) implemented several significant substantive changes affecting certain cases brought under the federal securities laws, including changes related to pleading, discovery, liability, class representation and awards fees and of 1995: Statements herein that are not historical facts are "forward-looking statements" involving risks and uncertainties, including by not limited to: the effect of global economic conditions, shifts in supply and demand, market acceptance, the impact of competitive products and pricing, product development, commercialization and technological difficulties, and capacity and supply constraints. Please refer to Cypress's Securities and Exchange Commission filings for a discussion of such risks. About MorethanIP MorethanIP was founded in 1999 as a GmbH (ltd.) in Munich, Germany, and is an IP and design house concentrating on high-speed communications and DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive technologies. This includes design, specification and implementation of standard products, system architectures and customer-specific solutions. For more information on the company and its products please email info@morethanip.com or visit the company's Web site at http://www.morethanip.com. Note to Editors: Programmable Serial Interface, PSI, Delta39K, IP Oasis and "Driving the Communications Revolution" are trademarks of Cypress Semiconductor. |
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