Cypress Speeds CPLD Programming with In-System Reprogrammable Software.Business Editors/High-Tech Writers SAN JOSE, Calif.--(BUSINESS WIRE)--Nov. 24, 2003 ISR(TM) Release 4.0 and Development Kit Support SVF and Chain-Independent STAPL STAPL Standard Test and Programming Language (Jam) STAPL Standard Template Adaptive Parallel Library Files For Embedded Programming Applications Cypress Semiconductor Corporation (NYSE NYSE See: New York Stock Exchange :CY) today announced availability of Release 4.0 of its In-System Reprogrammable (ISR(TM)) software for CPLDs. ISR refers to the ability to reprogram Cypress CPLDs even when they are mounted on a circuit board. Cypress also announced its latest development kit (CY3950I), featuring a USB USB in full Universal Serial Bus Type of serial bus that allows peripheral devices (disks, modems, printers, digitizers, data gloves, etc.) to be easily connected to a computer. 2.0 / 1.1 programming cable, which enables up to ten times improvement in programming speed over previous versions of the ISR software. These recent additions, combined with Cypress's Warp(TM) Release 6.3 software, round out the company's full arsenal of tools to support its Ultra37000(TM) and Delta39K(TM) CPLD (Complex PLD) A programmable logic device that is made up of several simple PLDs (SPLDs) with a programmable switching matrix in between the logic blocks. CPLDs typically use EEPROM, flash memory or SRAM to hold the logic design interconnections. See PLD and SPLD. families. In addition to supporting the world's largest CPLDs, ISR Release 4.0 adds a new layer of capabilities and compatibility by supporting the Serial Vector Format Serial Vector Format (SVF) is a vector exchange format, designed to enable transfer of boundary scan vectors between tools. SVF is expressing test patterns that represent the stimulus, expected response, and mask data for IEEE 1149.1-based tests. (SVF). SVF is a widely-adopted industry standard used to describe Joint Test Action Group (JTAG (Joint Test Action Group) An IEEE standard for boundary scan technology. See scan technology. JTAG - Joint Test Action Group ) signals in a more compact way than Standard Test and Programming Language (STAPL), making it more suitable in certain embedded programming applications. ISR Release 4.0 also extends its JEDEC The division of the Electronic Industries Alliance (EIA) that deals with semiconductor standards (officially, the JEDEC Solid State Technology Association of EIA). JEDEC was formed in 1958 when the Joint Electron Tube Engineering Council (JETEC) split into two Joint Electron Device STAPL support by adding the ability to create Chain Independent (CI) STAPL files. The ability to create CI STAPL files, in addition to the STAPL Chain Dependent files supported by previous versions of ISR, provides further compatibility with third-party JTAG tools. New features present in ISR Release 4.0 include improved chain validation functionality as well as a new Checksum A value used to ensure data are stored or transmitted without error. It is created by calculating the binary values in a block of data using some algorithm and storing the results with the data. Operation, designed to guarantee programming file integrity. ISR Release 4.0 supports Windows XP, Windows 2000, Windows ME, Windows 98 SE See Windows Second Edition. , Windows NT 4.0 Service Pack 5 or later. "Cypress has a long history of providing designers with the best tool set possible," said Gahan Richardson, senior marketing manager of Data Communications products for Cypress Semiconductor. "With this major increase in performance for our CPLD tools, we've significantly reduced design time, resulting in faster time-to-market for our customers." ISR Release 4.0 reduces design time in several ways. The latest release eliminates the need to recompose re·com·pose tr.v. re·com·posed, re·com·pos·ing, re·com·pos·es 1. To compose again; reorganize or rearrange. 2. To restore to composure; calm. the STAPL file before executing a new STAPL operation. A more user-friendly GUI detects all devices connected in the JTAG chain and automatically populates the GUI with these devices. Additionally, ISR Release 4.0 supports a new Playlist feature that allows multiple operations to be specified in a Playlist; these operations can then be executed consecutively on single or multiple devices in the JTAG chain. Pricing and Availability As with earlier versions of ISR, Release 4.0 may be downloaded free from the Cypress Website at http://www.cypress.com/support/link.cfm?sd=isr4. The development kit (CY3950I) is available now from Cypress's online store (http://www.onfulfillment.com/cypressstore/) for $99. About Cypress Cypress Semiconductor Corporation (NYSE:CY) is Connecting From Last Mile to First Mile(TM) with high-performance solutions for personal, network access, enterprise, metro switch, and core communications-system applications. Cypress Connects(TM) using wireless, wireline, digital, and optical transmission standards, including USB, Fibre Channel, SONET/SDH, Gigabit Ethernet, and DWDM (Dense WDM) The term given to wavelength division multiplexing (WDM) when significantly more channels were being added. Since WDM is increasingly more "dense" all the time, both terms are used synonymously. See WDM. DWDM - wavelength division multiplexing . Leveraging its process and system-level expertise, Cypress makes industry-leading physical layer devices, framers, and network search engines, along with a broad portfolio of high-bandwidth memories, timing technology solutions, and reconfigurable mixed-signal arrays. More information about Cypress is accessible online at www.cypress.com. Note to Editors: Cypress and the Cypress logo are registered trademarks of Cypress Semiconductor Corporation. ISR, Warp, Delta39K, Ultra37000, "Connecting From Last Mile to First Mile" and "Cypress Connects" are trademarks of Cypress. All other trademarks are the property of their respective owners. |
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