Cypress Introduces Third Generation In-System Reprogrammable Clock Generators.Business Editors/High-Tech Writers SAN JOSE San Jose, city, United States San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850. , Calif.--(BUSINESS WIRE)--Jan. 7, 2003 Newest Programmable Clock Stores Multiple Configurations to Simplify Consumer Electronics and Communications Control Systems Applications Cypress Semiconductor Cypress Semiconductor is a semiconductor design and manufacturing company. It began operations in 1982 and listed publicly in 1986. Two years later, the company shifted over to the New York Stock Exchange under the symbol, (NYSE: CY). Corporation (NYSE NYSE See: New York Stock Exchange :CY), the world leader in timing technology solutions, today announced a sampling of its third generation, in-system reprogrammable clock generators, Multiclock(TM) CY27EE16. The new Multiclock CY27EE16 has a built-in charge pump A charge pump is an electronic circuit that uses capacitors as energy storage elements to create either a higher or lower voltage power source. Charge pump circuits are capable of high efficiencies, sometimes as high as 90-95% while being electrically simple circuits. , enabling the designer to program or reprogram re·pro·gram tr.v. re·pro·grammed or re·pro·gramed, re·pro·gram·ming or re·pro·gram·ing, re·pro·grams To program again. re the device in-system without requiring any special external programming voltage or having to resort to an external programmer. Cypress is providing a complete timing solution with its innovative CyberClocks(TM) timing development tool suite, which supports Cypress's full line of programmable clocks. CyberClocks supports the CY27EE16 by allowing the system designer to customize his requirements in real time, under a programming simulation environment on his personal computer. The CY27EE16 is in-system programmable Refers to programmable logic chips (PLDs) that are programmed after they are attached to the circuit board. Also called "in-circuit programmable," devices that use static RAM (SRAM) are in-system programmable by nature because they are loaded at startup. See PLD. via an industry-standard I2C I2C Inter-Integrated Circuit I2C Intelligent Interface Controller I2C Intelligent Controller interface, and contains two Kbits of EEPROM (Electrically Erasable Programmable ROM) A rewritable memory chip that holds its content without power. Although EEPROMs spawned flash memory, EEPROMs are byte addressable at the write level, whereas flash chips must erase a block of bytes before rewriting. memory for storing clock configuration data plus an additional 16 Kbits of independent EEPROM memory. System designers can use this "extra" memory to store system information -- including revision levels, service codes, software patch information or any other changeable information -- without the need for additional memory chips. In addition, designers can use the 16 Kbits of memory to create multiple clock configurations on a single device. For example, customers can store up to eight different spread-spectrum profiles for use at any given time. "Cypress's timing solutions conserve cost and board space in a broad range of applications, from consumer electronics to communication systems," said John Wunner, marketing manager for Cypress's Timing Technology Division. "We're taking our leadership position one step further with this next generation of clocks that provide advanced functionality while radically simplifying timing design when used in conjunction with our easy-to-use CyberClocks software development tool suite." About CyberClocks Development Software CyberClocks development software simplifies timing design by introducing a "black-box" approach to configuring programmable clocks. While traditional software models cater to engineers who understand phase-locked loop (PLL PLL - phase-locked loop ) technology, the black-box approach of CyberClocks enables anyone, without any knowledge of the workings of a PLL, to simply specify input and output clock requirements and allow CyberClocks to compute the best configuration. CyberClocks software performs exhaustive computation on the requirements and optimizes the results to meet all the performance parameters set by the designer. The embedded design rule checking of the CyberClocks software ensures that the PLL system achieves stability under all valid programming conditions and data sheet parameters. CyberClocks integrates Cypress's entire suite of timing software tools (CyClocksRT(TM), CyClocks(TM), and RoboConfig(TM)) into one easy-to-use package. Pricing and Availability Samples of the CY27EE16 are available now in a 20-pin EP-TSSOP. Pricing starts at $2.45 in quantities of 10,000. CyberClocks software is free and can be downloaded off the web today at http://www.cypress.com/support. Select Software, then Programmable Clocks. About Cypress Cypress Semiconductor Corporation (NYSE:CY) is Connecting from Last Mile to First Mile(TM) with high-performance solutions for personal, network access, enterprise, metro switch, and core communications-system applications. Cypress Connects(TM) using wireless, wireline, digital, and optical transmission standards, including Bluetooth, USB USB in full Universal Serial Bus Type of serial bus that allows peripheral devices (disks, modems, printers, digitizers, data gloves, etc.) to be easily connected to a computer. , Fibre Channel, SONET/SDH, Gigabit Ethernet, and DWDM (Dense WDM) The term given to wavelength division multiplexing (WDM) when significantly more channels were being added. Since WDM is increasingly more "dense" all the time, both terms are used synonymously. See WDM. DWDM - wavelength division multiplexing . Leveraging its process and system-level expertise, Cypress makes industry-leading physical layer devices, framers, and network search engines, along with a broad portfolio of high-bandwidth memories, timing technology solutions, and programmable microcontrollers. More information about Cypress is accessible online at www.cypress.com. "Safe Harbor Safe Harbor 1. A legal provision to reduce or eliminate liability as long as good faith is demonstrated. 2. A form of shark repellent implemented by a target company acquiring a business that is so poorly regulated that the target itself is less attractive. " Statement under the Private Securities Litigation Reform Act The Private Securities Litigation Reform Act of 1995 (PSLRA) implemented several significant substantive changes affecting certain cases brought under the federal securities laws, including changes related to pleading, discovery, liability, class representation and awards fees and of 1995: Statements herein that are not historical facts are "forward-looking statements" involving risks and uncertainties, including but not limited to: the effect of global economic conditions, shifts in supply and demand, market acceptance, the impact of competitive products and pricing, product development, commercialization and technological difficulties, and capacity and supply constraints. Please refer to Cypress's Securities and Exchange Commission filings for a discussion of such risks. Note to Editors: Cypress and the Cypress logo are registered trademarks of Cypress Semiconductor Corporation. "Connectivity From Last Mile to First Mile", "Cypress Connects", Multiclock, CyberClocks, CyClocksRT, CyClocks, and RoboConfig are trademarks of Cypress. All other trademarks are the property of their respective owners. |
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