Cypress Extends Networking SRAM Portfolio to 18 Mbit Density; Synchronous and NoBL Memories Target Next-Generation Networking, Telecom Applications.Business Editors SAN JOSE, Calif.--(BUSINESS WIRE)--Aug. 11, 2000 Cypress Semiconductor Corp. (NYSE NYSE See: New York Stock Exchange :CY) today extended its networking-optimized SRAM See static RAM. SRAM - static random-access memory portfolio to the 18-Mbit density level for next-generation communications applications, including high-speed buffer memory and processor cache applications. The new devices, based on both the No Bus Latency(TM) (NoBL(TM)) and standard synchronous architectures, target a broad range of networking and telecom segments, including wireless infrastructure, wide area network (WAN), and storage area network (SAN). Cypress offers pipelined and flowthrough versions of these NoBL and standard synchronous devices in 1M x 18 and 512K x 36 configurations at 3.3-V and 2.5-V. The 2.5-V offering addresses the trend toward lower operating voltages: Lower-operating-voltage parts consume less power and are ideal for interfacing with the 2.5-V ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. devices used in today's networking systems. The pipelined versions of the devices deliver performance supporting bus speeds up to 167 MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. . "With the release of its 18-Mbit family, Cypress has attained a leadership position in synchronous, networking-optimized memories and underscored the fact that no one in the memory business has a broader offering of networking-optimized devices," said Tony Alvarez, senior vice president of Cypress's Memory Products Division. "Our new memories are a direct response to the needs of our strategic communications accounts, to whom we already provide a broad range of solutions in logic, timing technology, specialty memories, and physical-layer devices." NoBL SRAMs have an architecture optimized for the most demanding high-speed applications requiring maximum bus bandwidth. They eliminate the latency (dead cycles, or wait states) found in conventional synchronous burst SRAM architectures when transitioning between write and read operations. The NoBL architecture allows data transfer on every clock cycle, regardless of whether a write or read operation is taking place, thereby providing 100% bus utilization. The standard synchronous architecture is used used in many processor based systems, providing the Level 2 cache See L2 cache. level 2 cache - secondary cache that is critical to system performance. Product Availability Samples of the first device in the family -- the CY7C1380, a x36, 3.3 Volt, synchronous pipe SRAM -- are available now in standard 100-pin TQFP See QFP. . Samples of the other new 18-Mbit SRAMs will be become available through the rest of the year. All Cypress synchronous and NoBL memories are 100% compatible with industry standards, providing customers with the security of multiple vendor support. About Cypress Cypress Semiconductor provides high-performance integrated circuit solutions "By Engineers. For Engineers.(TM)" for fast-growing companies in fast-growing markets, including data communications, telecommunications, computation, consumer products, and industrial-control. With a focus on emerging communications applications, Cypress's product lines include networking-optimized and micropower static RAMs; high-bandwidth multi-port and FIFO (First In First Out) A storage method that retrieves the item stored for the longest time. Contrast with LIFO. See traffic engineering methods. FIFO - first-in first-out memories; high-density programmable logic devices; timing technology for PCs and other digital systems; and controllers for Universal Serial Bus See USB. (hardware, standard) Universal Serial Bus - (USB) An external peripheral interface standard for communication between a computer and external peripherals over an inexpensive cable using biserial transmission. (USB USB in full Universal Serial Bus Type of serial bus that allows peripheral devices (disks, modems, printers, digitizers, data gloves, etc.) to be easily connected to a computer. ). Cypress is No. 1 in the USB and clock chip markets. More than two-thirds of Cypress's sales come from fast-growing communications markets and dynamic companies such as Alcatel, Cisco, Ericsson, Lucent, Motorola, Nortel Networks, and 3Com. Cypress's ability to mix and match its broad portfolio of intellectual property enables targeted, integrated solutions for high-speed systems that feed bandwidth-hungry Internet applications. Cypress aims to become the preferred silicon supplier for Internet switching systems and for every Internet data stream to pass through at least one Cypress IC. Cypress's employs more than 4,100 people worldwide with international headquarters in San Jose, Calif. Its shares are listed on the New York Stock Exchange New York Stock Exchange (NYSE) World's largest marketplace for securities. The exchange began as an informal meeting of 24 men in 1792 on what is now Wall Street in New York City. under the symbol CY. More information about Cypress is accessible electronically on the company's worldwide web site at http://www.cypress.com or by CD-ROM CD-ROM: see compact disc. CD-ROM in full compact disc read-only memory Type of computer storage medium that is read optically (e.g., by a laser). (call 800/858-1810). An electronic investor forum, and other investor information, is located at http://www.cypress.com/investor/index.html. "Safe Harbor" Statement under the Private Securities Litigation Reform Act The Private Securities Litigation Reform Act of 1995 (PSLRA) implemented several significant substantive changes affecting certain cases brought under the federal securities laws, including changes related to pleading, discovery, liability, class representation and awards fees and of 1995: Statements herein that are not historical facts are "forward-looking statements" involving risks and uncertainties. Please refer to Cypress's Securities and Exchange Commission filings for a discussion of such risks. Note to Editors: No Bus Latency, NoBL and "By Engineers. For Engineers." are trademarks of Cypress Semiconductor. |
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