Cypress Expands Warp Software Support For Programmable Serial Interface (PSI) Devices.Business Editors/High-Tech Writers SAN JOSE, Calif.--(BUSINESS WIRE)--Jan. 9, 2002 New Capabilities in Warp(TM) Release 6.2 Speed Design Of Next-generation Communications Systems Cypress Semiconductor (NYSE NYSE See: New York Stock Exchange :CY) today launched the latest release of its popular Warp(TM) design tools and environment. Warp Release 6.2 expands its support for Cypress's Programmable Serial Interface(TM) (PSI(TM)) devices, a unique family of communications chips which combine high speed physical layer (PHY See physical layer and physical. ) technology with a flexible programmable logic architecture. Release 6.2 offers as much as a 35 percent improvement in design speed because of the addition of the Timing Aware(TM) feature, which allows the optimization of the fastest possible design routing solutions. "Warp Release 6.2 expands support for Cypress's industry-leading family of programmable PHYs with a comprehensive design, development, synthesis, and simulation environment," said Richard Quon, product marketing manager in the Data Communications Division at Cypress. "Warp will enable designers to develop PSI solutions for next-generation communications systems in the InfiniBand(TM), ESCON (Enterprise Systems CONnection) An IBM S/390 fiber-optic channel that transfers 17 Mbytes/sec over distances up to 60 km depending on connection type. ESCON allows peripheral devices to be located across large campuses and metropolitan areas. , Fibre Channel, Gigabit Ethernet, and SMPTE (Society of Motion Picture and Television Engineers, White Plains, NY, www.smpte.org) A professional society for motion picture and TV engineers with more than 9,000 members worldwide. It prepares standards and documentation for TV production. markets." "Timing Aware fitting, a new capability in the Warp environment, simplifies and speeds device design through its advanced algorithm implementation," said Rick Tinling, Cypress's director of software development. "Every programmable PHY design stands to benefit from this and other enhancements in this newest version of Warp software." About Warp Warp software is the No. 1 VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. and Verilog-based PLD (Programmable Logic Device) Refers to a variety of logic chips that are programmable at the customer's site, the customer being the vendor of the finished chip, not the end user. software tool, with over 27,000 installed seats. Introduced in 1991, Warp software pioneered the use of HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. for programmable logic design. Its design tools accept design entries using VHDL IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields. Standard 1076/1164 or Verilog IEEE Standard 1364. Warp software works in an integrated environment with all major third-party EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. toolsets, including Synplicity, Mentor Graphics and Synopsys. It provides the capabilities of development tools costing much more, enabling designers to capitalize on the performance and speed-to-market advantages of programmable logic with a minimal software investment. About PSI Cypress's PSI devices, the leading programmable PHYs in the industry, combine the high performance of the company's Serializer-Deserializer (SERDES See serializer/deserializer. ) technology with the flexibility, predictable timing, and ease-of-use of its Complex Programmable Logic Devices (CPLDs). In addition, these programmable PHYs enable the integration of large blocks of communications memories and phase-locked loops (PLLs) to ease design into communications systems. They are compatible with various physical layer transmission media -- fiberoptic modules, copper cables and circuit board traces -- and are ideally suited for communications backplanes and line cards in a broad range of markets, including InfiniBand, Gigabit Ethernet, Fibre Channel, and SONET. Availability and Pricing Warp Release 6.2 is available now via Cypress's website. Cypress continues to offer a value-driven $99 edition of Warp Release 6.2, along with two editions that provide additional design functionality. Cypress also offers industry-leading value by providing customers with free technical support and free upgrades for life. About Cypress Cypress Semiconductor is "Driving the Communications Revolution"(TM) with high-performance integrated circuits for network infrastructure and access equipment. Leveraging its process and system-level expertise, the company designs and manufactures solutions targeted across wireless and wireline communications. Cypress supports a wide range of industry standards, such as SONET (OC-48 and above), Voice over Internet Protocol (VoIP), InfiniBand(TM) and Gigabit Ethernet. The company's communications product lines include programmable high-speed physical layer devices (PHYs), wirespeed network search engines (NSEs) and network coprocessors (NCPs), and datapath switching elements (DSEs). Cypress is also the industry's leader in communications timing solutions, networking-optimized communications memories and personal connectivity solutions, such as USB USB in full Universal Serial Bus Type of serial bus that allows peripheral devices (disks, modems, printers, digitizers, data gloves, etc.) to be easily connected to a computer. and Bluetooth. Cypress is a leader in pure optical and optoelectronic technologies designed to push network transmissions to higher performance levels and to satisfy the increasing demand for network bandwidth. With a focus on emerging communications applications, Cypress aims to become the preferred silicon supplier for network infrastructure solutions and for every network data stream to pass through at least one Cypress IC. Cypress employs 4,000 people worldwide. Its shares are listed on the New York Stock Exchange New York Stock Exchange (NYSE) World's largest marketplace for securities. The exchange began as an informal meeting of 24 men in 1792 on what is now Wall Street in New York City. under the symbol CY. More information about Cypress is accessible on the Web at www.cypress.com. "Safe Harbor" Statement under the Private Securities Litigation Reform Act The Private Securities Litigation Reform Act of 1995 (PSLRA) implemented several significant substantive changes affecting certain cases brought under the federal securities laws, including changes related to pleading, discovery, liability, class representation and awards fees and of 1995: Statements herein that are not historical facts are "forward-looking statements" involving risks and uncertainties, including but not limited to: the effect of global economic conditions, shifts in supply and demand, market acceptance, the impact of competitive products and pricing, product development, commercialization and technological difficulties, and capacity and supply constraints. Please refer to Cypress's Securities and Exchange Commission filings for a discussion of such risks. Note to Editors: Warp, Programmable Serial Interface, PSI, Timing Aware, and "Driving the Communications Revolution" are trademarks of Cypress Semiconductor. InfiniBand is a trademark of the InfiniBand Trade Association The InfiniBand Trade Association (IBTA) is the standards organization that defines and maintains the InfiniBand specification. It is an industry consortium. The IBTA was established in 1999, and its most prominent members include Cisco, IBM, Intel, Mellanox, QLogic, Sun and . |
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