Cypress Enhances Run-Time and Support of Popular Warp CPLD Development Tool; New Capabilities in Warp Release 6.3 Speed Design of Communications Systems.Business Editors/High-Tech Writers SAN JOSE, Calif.--(BUSINESS WIRE)--Jan. 27, 2003 Cypress Semiconductor Corporation (NYSE NYSE See: New York Stock Exchange :CY) launched the latest release of the Warp(R) design tool and environment. Now with enhanced performance, Warp Release 6.3 (Warp R6.3) tool includes timing constraints specification capability, faster run-time, improved project management, and expansion of support for Cypress's industry-leading family of complex programmable logic devices (CPLDs). With over 28,000 software seats in place around the world and used in over 150 universities, the Warp development tool is one of the most popular HDL-based CPLD (Complex PLD) A programmable logic device that is made up of several simple PLDs (SPLDs) with a programmable switching matrix in between the logic blocks. CPLDs typically use EEPROM, flash memory or SRAM to hold the logic design interconnections. See PLD and SPLD. development tools in the world. Powerful and easy-to-use at every step in the development process, Warp R6.3 supports all of Cypress's programmable logic devices, including the Delta39K(TM) and Ultra37000(TM) CPLD families and the Programmable Serial Interface (PSI(TM)) family of physical layer (PHY See physical layer and physical. ) devices. Warp R6.3 enables designers to develop programmable PHY solutions for next-generation communications systems in the InfiniBand(TM), ESCON (Enterprise Systems CONnection) An IBM S/390 fiber-optic channel that transfers 17 Mbytes/sec over distances up to 60 km depending on connection type. ESCON allows peripheral devices to be located across large campuses and metropolitan areas. , Fibre Channel, Gigabit Ethernet, and SMPTE (Society of Motion Picture and Television Engineers, White Plains, NY, www.smpte.org) A professional society for motion picture and TV engineers with more than 9,000 members worldwide. It prepares standards and documentation for TV production. markets. "With a comprehensive design, synthesis, and simulation environment, the latest Warp R6.3 development tool offers complete software support for CPLDs," said Rajiv Nema, product marketing manager for CPLDs at Cypress. "Warp R6.3 provides the capabilities of tools costing much more, enabling designers to capitalize on the performance and speed-to-market advantages of programmable logic with a minimal software investment." Warp R6.3 Features Warp R6.3 adds the ability to specify timing constraints for all of the Delta39K CPLDs and programmable PHY devices. Significant run-time improvements have been made to the Warp front end in all versions of the Warp development tool to speed up the design process. For Warp Professional and Enterprise versions, compilation time enhancements have been made to the design flow manager. Cypress has also added valuable features such as report file bookmarking In genetics and epigenetics, bookmarking is a biological phenomenon believed to function as an epigenetic mechanism for transmitting cellular memory of the pattern of gene expression in a cell, throughout mitosis, to its daughter cells. to improve project management and expanded support for Delta39K family of CPLDs. On the PC platform, Warp R6.3 includes the post-synthesis timing simulator Active-HDL Sim(TM) version 3.3 and the finite-state machine (FSM See finite state machine. 1. (mathematics, algorithm, theory) FSM - Finite State Machine. 2. (networking) FSM - FDDI Switching Module. (3Com implements this device on its LAN switches). ) editor Active-HDL FSM(TM), from Aldec Inc. Active-HDL Sim is a full-featured post-synthesis VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. timing simulator that supports simulation of VHDL and Verilog files compiled to Cypress devices. Pricing and Availability Cypress continues to offer a value-driven $99 edition of Warp R6.3, along with two editions that provide additional design functionality: Warp Professional and Warp Enterprise. Cypress also offers industry-leading value by providing customers with free technical support and free upgrades for life. The Warp R6.3 update is free to existing Warp tool users and can be downloaded off the Cypress website today at www.cypress.com/support/link.cfm?sd=warp63pcupdate. About Cypress Cypress Semiconductor Corporation (NYSE:CY) is Connecting From Last Mile to First Mile(TM) with high-performance solutions for personal, network access, enterprise, metro switch, and core communications-system applications. Cypress Connects(TM) using wireless, wireline, digital, and optical transmission standards, including Bluetooth, USB USB in full Universal Serial Bus Type of serial bus that allows peripheral devices (disks, modems, printers, digitizers, data gloves, etc.) to be easily connected to a computer. , Fibre Channel, SONET/SDH, Gigabit Ethernet, and DWDM (Dense WDM) The term given to wavelength division multiplexing (WDM) when significantly more channels were being added. Since WDM is increasingly more "dense" all the time, both terms are used synonymously. See WDM. DWDM - wavelength division multiplexing . Leveraging its process and system-level expertise, Cypress makes industry-leading physical layer devices, framers, and network search engines, along with a broad portfolio of high-bandwidth memories, timing technology solutions, and programmable microcontrollers. More information about Cypress is accessible online at www.cypress.com. "Safe Harbor Safe Harbor 1. A legal provision to reduce or eliminate liability as long as good faith is demonstrated. 2. A form of shark repellent implemented by a target company acquiring a business that is so poorly regulated that the target itself is less attractive. " Statement under the Private Securities Litigation Reform Act The Private Securities Litigation Reform Act of 1995 (PSLRA) implemented several significant substantive changes affecting certain cases brought under the federal securities laws, including changes related to pleading, discovery, liability, class representation and awards fees and of 1995: Statements herein that are not historical facts are "forward-looking statements" involving risks and uncertainties, including but not limited to: the effect of global economic conditions, shifts in supply and demand, market acceptance, the impact of competitive products and pricing, product development, commercialization and technological difficulties, and capacity and supply constraints. Please refer to Cypress's Securities and Exchange Commission filings for a discussion of such risks. Cypress, the Cypress logo and Warp are registered trademarks of Cypress Semiconductor Corporation. "Connectivity From Last Mile to First Mile," "Cypress Connects," Delta39K and Ultra37000 are trademarks of Cypress. All other trademarks are the property of their respective owners. |
|
||||||||||||||||
Printer friendly
Cite/link
Email
Feedback
Reader Opinion