Cypress Clock Generator Supports Emerging Cell Processor Applications.SAN JOSE, Calif. -- Meets Specification for Both XDR (1) (EXternal Data Representation) A data format developed by Sun that is part of its networking standards. It deals with integer size, byte ordering, data representation, etc. and is used as an interchange format. (TM) Memory Systems and FlexIO(TM) Processor Bus for Use in Consumer Electronics, Game Consoles, Networking, and Advanced Computing Systems Cypress Semiconductor Corporation (NYSE NYSE See: New York Stock Exchange :CY), a world leader in timing-technology solutions, has introduced a clock generator specifically developed to provide the high performance clock signals required for both the Rambus Inc. XDR(TM) (Extreme Data Rate) memory systems and the FlexIO(TM) processor bus interface supporting applications that employ the new "Cell processor" architecture. The Cell processor, developed jointly by IBM (International Business Machines Corporation, Armonk, NY, www.ibm.com) The world's largest computer company. IBM's product lines include the S/390 mainframes (zSeries), AS/400 midrange business systems (iSeries), RS/6000 workstations and servers (pSeries), Intel-based servers (xSeries) , Sony and Toshiba, is optimized for the kind of real-time calculations needed in today's broadband, media-rich environment such as game consoles, consumer electronics, and advanced computing systems. It employs nine processors on a single chip, with a specially designed 300-gigabit-per-second bus knitting the processors into a single machine. The Rambus XDR memory and FlexIO processor bus interfaces account for 90% of the Cell processor signal pins, providing an unprecedented aggregate processor I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output. I/O - Input/Output bandwidth of approximately 100 gigabytes-per-second. The Cypress XDR clock generator (XCG XCG Xdr Clock Generator ) provides four programmable differential outputs using a reference input clock of either 100 MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. or 133 MHz to enable the 6.4 GB/sec XDR memory system and the up to 8.0 GHz FlexIO processor bus. The XCG also supports spread spectrum modulation, reducing the EMI (ElectroMagnetic Interference) An electrical disturbance in a system due to natural phenomena, low-frequency waves from electromechanical devices or high-frequency waves (RFI) from chips and other electronic devices. Allowable limits are governed by the FCC. generated from the clock distribution network. "The Cypress XCG adds a new capability to our consumer clock portfolio, providing a very high-performance clock generator to meet the needs of next generation digital entertainment systems," said Mehdi Behnami, product marketing manager of Cypress's General Purpose Clocks Business Unit. "It gives us inroads inroads Noun, pl make inroads into to start affecting or reducing: my gambling has made great inroads into my savings inroads npl to make inroads into [+ into high-performance, high-volume applications with major customers worldwide." "Working with industry leaders such as Cypress to bring advanced clock generators to the market helps to build out the high-volume production infrastructure for our XDR memory solution," said David Nguyen, vice president of engineering at Rambus Inc. "The XDR clock generator is a critical component in XDR and FlexIO implementations, providing the high performance clock signals required for advanced high-speed applications." The new Cypress XCG (CY24271ZXC) offers an array of features and functions, including: --25-picosecond typical cycle-to-cycle jitter A flicker or fluctuation in a transmission signal or display image. The term is used in several ways, but it always refers to some offset of time and space from the norm. For example, in a network transmission, jitter would be a bit arriving either ahead or behind a standard clock cycle ---135 dBc/Hz typical phase noise at 20 MHz offset --100 or 133 MHz differential clock input --300 to 800 MHz high-speed clock support --Quad (open drain) differential output drivers --Supports frequency multipliers: 3,4,5,6,8,9/2,15/2 and 15/4 --2.5V operation Price and Availability The CY24271ZXC XCG is available today in a 28-pin TSSOP TSSOP Thin Shrink Small Outline Package TSSOP Thin Scale Small Outline Package package. Pricing for the device is under $2.50 in 1000-unit quantities. A high-resolution photo is available at www.cypress.com/XCG-photo. About Cypress Cypress solutions perform: consumer, computation, data communications, automotive, industrial, and solar. Leveraging proprietary silicon processes, Cypress's product portfolio includes a broad selection of wired and wireless USB devices, CMOS image sensors, timing solutions, specialty memories, high-bandwidth synchronous and micropower memory products, optical solutions and reconfigurable mixed-signal arrays. Cypress trades on the NYSE under the ticker symbol CY. Visit us at www.cypress.com. Cypress and the Cypress logo are registered trademarks of Cypress Semiconductor Corporation. XDR and FlexIO are trademarks of Rambus Inc. All other trademarks are the property of their respective owners. |
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