Crosspoint Solutions Introduces ASIC-Compatible CoreBank Program; Provides Rich Library of Synthesis-Friendly IP Cores for High Density FPGAs.LAS VEGAS--(BUSINESS WIRE)--June 3, 1996--Crosspoint Solutions Inc. announced a new program called "CoreBank(TM)" that further accelerates the movement towards systems-on-a-chip FPGAs at the Design Automation Conference in Las Vegas today. This program comprises a rich library of systems building blocks developed by Crosspoint Solutions and its CoreBank program partners to facilitate the successful design of high-density customer-programmable ASICs. These CoreBank functions provide designers access to proven Crosspoint Solutions and third-party intellectual property (IP) building blocks for incorporation into designs made with Crosspoint Solutions CP20K and CP100K CrossFire(TM) FPGAs. Initial CoreBank program partners include Integrated Silicon Systems (ISS ISS See Institutional Shareholder Services (ISS). ), Eureka Technology, Sierra Research and Technology, Sand Microelectronics and VAutomation. These partners deliver state-of-the-art cores for digital signal processing See DSP. Digital Signal Processing - (DSP) Computer manipulation of analog signals (commonly sound or image) which have been converted to digital form (sampled). (DSP), communications, computer and network applications. Additional IP-provider partners will be added over the next year. "The CoreBank program is crucial to getting system-level ASIC designs to market quickly while successfully managing the ever increasing design complexity of our FPGAs," stated Mike Levis, vice president of marketing at Crosspoint Solutions. "This breakthrough program of technology-independent building blocks enables the ASIC designer complete freedom to seamlessly migrate between gate arrays and high-density FPGAs. And because these cores were developed using HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. methodology, they are fully customizable to a particular application and compatible with leading EDA tools." Dr. James Doherty, president of Integrated Silicon Systems, said, "The alliance between ISS and Crosspoint Solutions is a natural since their fine-grained FPGA architecture is absolutely gate-array like and thus is fully compatible with industry-standard HDL synthesis and EDA tools. The result is a three-way win for all involved, but mostly a win for our customers who now have access to the latest DSP building blocks for their next generation systems." "We are pleased to be a founding member of Crosspoint Solutions CoreBank program," said Eric Ryherd, president of VAutomation Inc. "Our library of proven and tested microprocessor and industry-standard PC functions will allow designers to concentrate on adding value to their systems using Crosspoint ASICs without reinventing the wheel." The CoreBank library will include a large selection of functions ranging from simple register files to large system-level building blocks as detailed in the table. All CoreBank functions have complete synthesis and simulation models, include test vectors and are fully parameterized for maximum flexibility. -0-
Computer Communications Digital Signal
Processing
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High Complexity 8051 82530 SCC 79C90 320C25
greater than Micro- 2 channel LAN DSP
4000 gates controller Controller
8052 16550 100 Mbs JPEG
Micro- UART Ethernet
controller
765A Z80 10 Mbs MPEG
Floppy Processor Ethernet
Controller
82365SL 53CF94 82530 SCC Object
PCMCIA SCSI 2-channel Detection
Controller (Enhanced)
R3000 FDC 16550 H.261
Processor PC Floppy UART
Controller
8086 80186 HDLC
Processor Processor
6502
Processor
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Medium 6845 CRT 8237 DMA 8255 FIR
Complexity Controller GPPI
1,000 -
4,000 gates 8048 91C360 I2C Bus IIR
Micro- Floppy Interface
controller Data
Separator
PCMCIA IEEE 1284 8251 FFT
Interface Parallel USART
Port
8253 PIT 8254 PIT 8250 UART LMS Filter
8042 PIM 8490 SCSI VQ
Power PC 8250 QMF
Bus UART
8251 146818 DCT
USART RTC
PCI 8259 PIC
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Low Complexity MAC Adder SQRT Multiplier
less than
1,000 gates JTAG FIFO Accumulator Comparator
useful for all
markets Barrel Bus Register Boundary
Shifter controller File Scan-0-
CoreBank building blocks will be actively marketed and licensed for use in Crosspoint Solutions customer-programmable ASICs by both Crosspoint and the CoreBank partners. This will provide customers the broadest access to system-level design solutions for their ASIC and FPGA designs. Integrated Silicon Systems Ltd. (ISS) is a integrated circuit company specializing in the development of advanced DSP ASICs and DSP ASIC cores. ISS provides DSP silicon libraries, DSP ASIC compilers, DSP application-specific standard products and DSP chip design and consultancy services. The company is headquartered at the Northern Ireland Technology Centre, Chlorine Park, Malone Road, Belfast, Ireland BT9 5HN. The company's telephone number is +44-1232-664664, and the fax number is +44-1232-669664. VAutomation develops and markets a library of synthesizable HDL Cores for use by systems and integrated circuit designers worldwide. The company's offices are located at 20 Trafalgar Square, Suite 443, Nashua, N.H. 03063. The telephone number is 603/883-2282, the fax number is 603/882-1587, and the email address is info@VAutomation.com. Crosspoint Solutions Inc was founded in 1989 to develop and market the first real fully customer-programmable ASIC. The company's FPGAs feature compatible gate array architecture, and employ the same industry-standard EDA (design) tools and libraries as the leading ASIC vendors. The company is located at 694 Tasman Drive, Milpitas, Calif. 95035. The main telephone number is 408/324-0200, and the facsimile number is 408/324-0123. -0- Note to Editors: The Crosspoint Solutions logotype is a registered trademark and "CoreBank" and "CrossFire" are trademarks belonging to Crosspoint Solutions Inc. For further information on the CoreBank program, IP building-block providers and system designers should contact Ken Hodor at Crosspoint Solutions (408/943-4517 or email corebank@xpoint.com). Glossary: ASIC = Application-specific Integrated Circuit (hardware) Application-Specific Integrated Circuit - (ASIC) An integrated circuit designed to perform a particular function by defining the interconnection of a set of basic circuit building blocks drawn from a library provided by the circuit manufacturer. ; CRT (1) (C RunTime) See runtime library. (2) (Cathode Ray Tube) A vacuum tube used as a display screen in a computer monitor or TV. The viewing end of the tube is coated with phosphors, which emit light when struck by electrons. = Cathode Ray Tube See CRT. (hardware) cathode ray tube - (CRT) An electrical device for displaying images by exciting phosphor dots with a scanned electron beam. CRTs are found in computer VDUs and monitors, televisions and oscilloscopes. ; DCT (Discrete Cosine Transform) An algorithm that is widely used for data compression. Similar to Fast Fourier Transform, DCT converts data (pixels, waveforms, etc.) into sets of frequencies. The first frequencies in the set are the most meaningful; the latter, the least. = Discrete Cosine Transform See DCT. (mathematics) discrete cosine transform - (DCT) A technique for expressing a waveform as a weighted sum of cosines. The DCT is central to many kinds of signal processing, especially video compression. ; DMA = Direct Memory Access; DSP = Digital Signal Processing; EDA = Electronic Design Automation; FDC = Floppy Disk Controller A floppy disk controller (FDC) is a special-purpose chip and associated circuitry that directs and controls reading from and writing to a computer's floppy disk drive (FDD). ; FFT = Fast Fourier Transform See FFT. (algorithm) Fast Fourier Transform - (FFT) An algorithm for computing the Fourier transform of a set of discrete data values. Given a finite set of data points, for example a periodic sampling taken from a real-world signal, the FFT expresses the data in terms of ; FIFO (First In First Out) A storage method that retrieves the item stored for the longest time. Contrast with LIFO. See traffic engineering methods. FIFO - first-in first-out = First-In, First-Out; FIR = Finite Impulse Response (electronics, DSP) Finite Impulse Response - (FIR) A type of digital signal filter, in which every sample of output is the weighted sum of past and current samples of input, using only some finite number of past samples. ; FPGA = Field-programmable Gate Array (hardware) field-programmable gate array - (FPGA) A gate array where the logic network can be programmed into the device after its manufacture. An FPGA consists of an array of logic elements, either gates or lookup table RAMs, flip-flops and programmable interconnect wiring. ; GPPI = General Purpose Parallel Interface; H.261 = CCITT standard for transmitting audio over IDSN lines; HDL = High-level Design Language; IIR = Infinite Impulse Response (electronics, DSP) Infinite Impulse Response - A type of digital signal filter, in which every sample of output is the weighted sum of past and current samples of input, using all past samples, but the weights of past samples are an inverse function of the sample age, approaching ; I2C = Inter-IC Bus; JPEG = Joint Photographic Experts Group (image, body, file format, standard) Joint Photographic Experts Group - (JPEG) The original name of the committee that designed the standard image compression algorithm. JPEG is designed for compressing either full-colour or grey-scale digital images of "natural", real-world scenes. ; JTAG = Joint Test Action Group; LAN = Local Area Network; LMS = Least Mean Square; MAC = Multiplier-ACcumulator; MPEG (Moving Pictures Experts Group) An ISO/ITU standard for compressing digital video. Pronounced "em-peg," it is the universal standard for digital terrestrial, cable and satellite TV, DVDs and digital video recorders (DVRs). = Motion Picture Experts Group (spelling) Motion Picture Experts Group - Incorrect expansion of MPEG, which stands for Moving Picture Experts Group. ; PCI = Personal Computer Interface; PCMCIA = Personal Computer Memory Card International Association (body, hardware, standard) Personal Computer Memory Card International Association - (PCMCIA, or "PC Card") An international trade association and the standards they have developed for devicies, such as modems and external hard disk drives, that can be plugged into notebook ; PIC = Programmable Interrupt Counter; PIM = Peripheral Interface Microcontroller; PIT = Programmable Interrupt Timer; QMF = Quadrature Mirror Filter In digital signal processing, a quadrature mirror filter is a filter most commonly used to implement a filter bank that splits an input signal into two bands. The resulting high-pass and low-pass signals are often decimated by a factor of 2, giving a critically sampled two-channel ; RTC = Real Time Clock; SCC = Serial Communications Controller; SCSI = Small Computer System Interface; SQRT = SQuare RooT; UART = Universal Asynchronous Refers to events that are not synchronized, or coordinated, in time. The following are considered asynchronous operations. The interval between transmitting A and B is not the same as between B and C. The ability to initiate a transmission at either end. Receiver and Transmitter; USART = Universal Synchronous/Asynchronous Receiver and Transmitter. CONTACT: Crosspoint Solutions Inc Michael Levis, 408/324-0200 DAC Booth No. 1500 (Hewlett-Packard) or Alfaro Company Kim Alfaro, 415/563-4769 |
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