Coming May 2002: Sequence NanoCool Design Seminars in CA, TX, MA & Canada Unlock Secrets of Low-power SoC Design; Sun and Circuit Semantics to Co-Sponsor.

Business Editors/High-Tech Writers

SANTA CLARA, Calif.--(BUSINESS WIRE)--May 2, 2002

Sequence Design will host a free seminar series on the challenges of low power/low voltage IC design and how to overcome them in five new cities this month. Sun Microsystems and Circuit Semantics will co-sponsor the series:

          May 7  -- Austin, Texas
          May 8  -- Richardson, Texas
          May 14 -- Kanata, Ontario, Canada
          May 16 -- Bedford, Mass.
          May 22 -- Costa Mesa, Calif.

Designers and engineering management from systems and semiconductor companies interested in registering to attend may do so online at: http://www.sequencedesign.com/2_solutions/wp_forms/ nanocoolseminar.html.

Seminar highlights include a luncheon and keynote address by a local nanometer design notable, an overview of the NanoCool initiative from Sequence, and a presentation detailing NanoCool contributions from Circuit Semantics.

Circuit Semantics produces advanced timing and power models from their characterization tools. This enables mutual customers to produce highly correlated libraries for RTL and gate level power analysis. Circuit Semantics is working with Sequence to produce advanced noise models for use with Sequence's signal integrity tools.

Design teams facing the issue of low-rail voltage margin narrowing and its impact on signal integrity will benefit from this seminar as will those faced with power consumption limitations stressed by finite battery life or package constraints. Examining emerging trends in power design, the half-day session includes detailed descriptions of flows, tools, and methods addressing low voltage/low power design.

"Sequence is using its technology leadership position in this field -- exemplified by the capabilities of tool suites such as our PowerTheater and PhysicalStudio -- to build a robust NanoCool coalition, promoting a low-power/low-voltage flow spanning the architectural, logical, and physical design techniques mandated by today's ultra-DSM environment," said Vic Kulkarni, chief operating officer at Sequence Design.

The NanoCool initiative, launched in March 2002, is a joint venture between semiconductor designers, EDA tool vendors, IP companies, and library suppliers, to provide a complete flow offering concurrent power management, timing and signal integrity capabilities to achieve rapid design closure at 130nm and below. In addition to Circuit Semantics, Virtual Silicon and Silicon Metrics are members of the initiative.

The issues being addressed in these seminars are growing in importance, as noted in the Feb. 27, 2002 issue of EE Times: "Power has indeed become the biggest challenge in IC design," said Gary Smith, chief EDA analyst at Gartner Dataquest.

"Sequence has a unique strategy ... what they are doing is surrounding the IC implementation tool set, the idea being that in order to get rapid design closure, these tools leave a lot of performance on the table. By using the Sequence tools, you can eliminate a great deal of the slack."

According to Jose Torres, vice president of product marketing at Circuit Semantics, "this joint seminar presents, for the first time, a unified CSI and Sequence flow for Spice accurate power characterization of standard cell libraries that can be read directly by Sequence's PowerTheater. Once the models are generated they can be used in the development of higher level blocks and system-on-chip devices for improved performance and lower power consumption."

For information on additional seminar locations, interested parties may contact a Sequence sales representative, or visit the Sequence website: http://www.sequencedesign.com/3_news/3b_events_nc.html

Sponsors

Circuit Semantics, Inc. provides timing and characterization solutions for high performance cells, cores, and blocks based on innovative technology for which patents are currently pending. For more information: www.circuitsemantics.com.

Sun Microsystems, Inc. (Nasdaq: SUNW) is a leading provider of industrial-strength hardware, software and services that make the Net work. For more information: http://sun.com

Sequence Design, Inc., the SoC Design Closure Company(SM), develops RTL and physical design EDA tools to give its customers the competitive advantage to accelerate the turn-around time for their sub-180nm designs. For more information: sequencedesign.com.

Note to Editors: Sun, Sun Microsystems and the Sun logo are trademarks or registered trademarks of Sun Microsystems, Inc. in the United States and other countries. All other trademarks mentioned herein are the property of their respective owners.