Collaborative OVI and Si2 Efforts Result in IEEE Approval of 1481; Delay and Power Calculation System DPCS Specification Awarded Formal Standardization.

AUSTIN, Texas--(BUSINESS WIRE)--July 26, 1999--

-Silicon Integration Initiative Inc. (Si2), an industry organization that provides synergistic multi-company engineering services, today announced the formal approval of the Delay and Power Calculation System DPCS as an IEEE Standard.

The DPCS Standard includes the Delay Calculation Language (DCL) and the DPC Application Procedural Interface (DPC-API), as well as the Standard Parasitic Exchange Format (SPEF) and Physical Design Exchange Format (PDEF). The advantages of DPCS lays a solid foundation for faster and more accurate design using the next-generation silicon processes. DPCS is also the basis for Open Library API (OLA), the next generation for library representation.

The DCL is a comprehensive modeling language used to describe the circuit and interconnect delay and power characteristics of deep-submicron IC Libraries. DCL is the heart of the suite of standards that make up the DPCS. The key customer benefit is faster convergence on IC timing goals and power budgets due to greater library accuracy and consistency throughout the EDA flow.

The DPCS effort was started with an agreement struck between Si2 and IBM in 4Q94. The technology's foundation is based on proven technology developed and used by IBM within its suite of IC design tools. Working collaboratively, IBM transferred the DCL to Si2 for the purpose of refining it to fit industry requirements for availability to ASIC and EDA suppliers worldwide.

Si2 and Open Verilog International (OVI) along with 11 ASIC suppliers (Fujitsu, Hitachi, IBM, Matsushita, Mitsubishi, Motorola, NEC, OKI, Sharp, Sony, Toshiba) in the U.S. and driven by the EIAJ in Japan, came together in Q195 to facilitate the process of defining and delivering all necessary requirements for the DCL and its affiliate EDA software program interface (PI). The Si2 and OVI teams, comprised of semiconductor and design automation technical professionals, collaborated to refine DCL and the PI to the delay and power calculation engine to fulfill identified requirements and needs of the semiconductor and EDA industries. In addition, this group developed an open-exchange format for circuit parasitics (SPEF) and floor-planning (PDEF) based on technology contributions from Cadence and Synopsys, respectively. By harmonizing these formats and the DCL, a comprehensive solution was provided for delay and power calculations of IC designs.

Through Si2's formal balloting and voting process, the working groups approved the initial specifications for timing support in May 1996, and voted to submit for formal standardization through the IEEE where it was extended to include power. The standard (1481) was formally approved by the IEEE June 26, 1999.

"The designers of advanced semiconductor devices are plagued with significant timing convergence issues today," said Dennis Brophy, chairman of the IEEE 1481 Working Group and OVI, and director of Strategic Business Development at Model Technology Inc. "The IEEE 1481 Delay and Power Calculation System standard is the major foundation upon which next-generation timing analysis methodologies will be based to address these issues."

Using the DPCS as a basis, the ASIC Council proposed the Open Library API (OLA) as a single library format to be used by all EDA tools. The objective is to increase the quality of deep sub-micron designs by specifying a single library that addresses the issues of timing accuracy, accurate power calculation, synthesis, and eventually layout, while providing library data management and protection of intellectual property. The Council has overseen the development and industry adoption of OLA and availability of the Open Library API (OLA) compiler, version 3.1. This compiler is compliant to the IEEE 1481 (DCL - Delay Calculation Language) standard. Efforts are now underway to submit OLA to the IEEE this year as an extension to the 1481 standard.

About Si2

Silicon Integration Initiative Inc. (Si2) provides engineering consultation and services to industry-leading silicon, electronic systems, and EDA companies for synergistic multi-company efforts focused on improving productivity and costs in the design and production of integrated silicon systems. The organization represents members throughout North America, Europe and Asia.

More information on Si2 is available from its Web site at http://www.si2.org.

About OVI

OVI, founded in 1990, supports the IEEE 1364 standard for Verilog HDL and related standards for digital, analog and mixed-signal design representations. OVI also sponsors standards development efforts for next-generation design methodologies. This includes support of technical groups involved with development of standards for the Verilog Register transfer-level (RTL) subset, Design Constraints, IEEE 1481 Delay and Power Calculation System (DPCS), Formal Verification, Physical Design Libraries, Architectural language and the Advanced Library Format (ALF).