CoWare and AccelChip Partner to Deliver Advanced Design and Verification Flow for Design Teams Using MATLAB Algorithms.SANTA CLARA, Calif. -- Full DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive System Verification Infrastructure Enables Reliable Hardware Implementation CoWare(R) Inc., the leading supplier of system-level electronic design automation (EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. ) software and services, and AccelChip Inc., the industry's only provider of automated flows from MATLAB (MATrix LABoratory) A programming language for technical computing from The MathWorks, Natick, MA (www.mathworks.com). Used for a wide variety of scientific and engineering calculations, especially for automatic control and signal processing, MATLAB runs on Windows, Mac and (R) algorithms to silicon, are teaming to provide an advanced design and verification flow for DSP designs that originate in MATLAB. The companies have integrated CoWare's DSP application design tool, SPW SPW Signal Processing Workstation SPW Shelter in Place Warning SPW Spencer, IA, USA - Spencer Municipal Airport (Airport Code) SPW Special Purpose Weapon SPW Spokane Washington (border patrol sector) , with AccelChip's algorithmic synthesis tools to offer DSP design teams the ability to verify generated RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; code in Verilog or VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. within the SPW environment. "AccelChip provides MATLAB-based algorithmic synthesis for FPGAs and ASICs by automatically generating VHDL or Verilog from MATLAB algorithms. By partnering with CoWare, our mutual customers can now verify their algorithms at all levels of abstraction -- MATLAB, RTL and gate -- within the context of the entire system. CoWare's SPW provides a full DSP system verification infrastructure that includes an extremely fast simulation engine. The combination of AccelChip's automatic, algorithmic-based implementation flow and CoWare's DSP verification environment enables customers to have complete confidence as they implement their complex DSP designs," said Tom Feist feist also fice n. Chiefly Southern U.S. A small mongrel dog. [Variant of obsolete fist, short for fisting dog, from Middle English fisting, , vice president of sales and marketing, AccelChip. "With the integration of SPW and AccelChip -- one of the most innovative MATLAB-based implementation technologies -- design teams have access to fast and accurate DSP verification when implementing MATLAB designs," said Mark Milligan, vice president of marketing, CoWare. "Along with the enhanced MATLAB simulation and analysis capabilities in the new SPW 5-XP -- announced in a separate news release today -- this integration highlights our commitment to supporting the technologies in the MATLAB ecosystem." Integration Provides System-Level Verification The integration between SPW and AccelChip(R) DSP Synthesis lets designers using AccelChip's MATLAB-based, algorithm synthesis flow verify each level of their design in SPW. DSP designers typically start their design process in MATLAB, the world's leading software for algorithm design. The AccelChip DSP Synthesis product generates fixed-point MATLAB from the original MATLAB floating-point algorithm, and then synthesizes RTL -- either VHDL or Verilog -- from the fixed-point MATLAB. SPW allows designers to simulate their floating-point MATLAB algorithms. After running the design through the AccelChip toolset, the designer can import the RTL generated from AccelChip into SPW to verify at the RTL level. This approach provides a complete, system-wide verification of the complete signal processing design. About the Products CoWare SPW -- The DSP Workbench -- is a complete DSP application design platform featuring high performance simulation technology and an easily accessible, large library of 4000+ DSP application models. SPW integrates with many leading tools supporting design flows using MATLAB, C/C C/C Center to Center C/C Combustion Chamber C/C Command/Control C/C Crew Chief C/C cabin cruiser (US DoD) C/C chief complaint (medical) C/C Channel-to-Channel C/C Communication and Collaboration ++, SystemC, Verilog/VHDL and Verilog-AMS. Its up-to-date communications and multimedia libraries reduce time and effort for customers designing for standards like 3GPP GPP Government Performance Project GPP General Purpose Processor GPP General Physical Preparedness GPP Gambian People's Party GPP Good Pharmacy Practice GPP Gross Primary Productivity GPP Green Procurement Program GPP Generic Packetized Protocol , UWB (Ultra-WideBand) A wireless technology that uses less power and provides higher speed than 802.11 Wi-Fi networks or first-generation Bluetooth products. UWB is expected to provide wireless video transmission for home theater systems, cable TV, auto safety and or 802.11. The AccelChip DSP Synthesis tool automatically generates synthesizable, cycle-accurate RTL models directly from MATLAB M-files. The tool's enhanced floating- to fixed-point conversion gives the designer much better control over trade-offs between performance, area, and accuracy. AccelChip DSP Synthesis enables system-level verification of all components using libraries and math-based models, increases efficiency, and provides unheard of flexibility by allowing designers to explore architectural possibilities without ever touching their golden source. Availability CoWare SPW 4.85 featuring AccelChip application support is available to SPW customers today. Future releases of SPW 5-XP for Windows, announced in a separate news release today, will provide similar integration. For pricing information, contact your local sales office or email spw@coware.com. For more information on SPW and CoWare's other products, visit www.coware.com. For more information on any of the AccelChip products, please email sales@accelchip.com or visit www.accelchip.com/sales.html. About AccelChip AccelChip Inc. develops and markets a MATLAB-based algorithmic synthesis environment and intellectual property that automate the development and implementation of DSP designs. The company's unique DSP Design Automation (DDA) solutions reduce design iterations, accelerate the creation and verification of register-transfer language (RTL), and link the domain-specific DSP design environment with industry-standard hardware design flows targeting FPGAs and ASICs. Founded in 2000, AccelChip is located in Milpitas, California, and has design centers in Portland, Oregon, and Carlsbad, California. AccelChip's Web address is www.accelchip.com. About CoWare CoWare is the leading supplier of system-level electronic design automation (EDA) software tools and services. CoWare offers a comprehensive set of electronic system-level (ESL) tools that enable SoC developers to "differentiate by design" through the creation of system-IP including embedded processors, on-chip buses, and DSP algorithms; the architecture of optimized SoC platforms; and hardware/software co-design. The company's solutions are based on open industry standards including SystemC. CoWare's customers are major systems, semiconductor, and IP companies in the market where consumer electronics, computing, and communications converge. CoWare's corporate investors include ARM Ltd. (LSE LSE - Language Sensitive Editor :ARM) (Nasdaq:ARMHY), Cadence Design Systems (company) Cadence Design Systems - A company that sells electronic design automation software and services. http://cadence.com/. See also Verilog. (NYSE NYSE See: New York Stock Exchange :CDN (Content Delivery Network) A system of distributed content on a large intranet or the public Internet in which copies of content are replicated and cached throughout the network. ), ST Microelectronics (NYSE:STM (Scanning Tunneling Microscope) A microscope that can image down to the atomic level. An STM uses a piezoelectric tube with a tiny sharp tip at the end that is moved within nanometers of the object being sampled. ), and Sony Corporation (NYSE:SNE). CoWare is headquartered in San Jose, Calif., and has offices around the world. For more information about CoWare and its products and services, visit http://www.coware.com. CoWare is a registered trademark of CoWare, Inc in the United States. AccelChip and AccelWare are registered trademarks of AccelChip Inc. All other trade names referenced are the service marks, trademarks, or registered trademarks of their respective companies. |
|
||||||||||||||
Printer friendly
Cite/link
Email
Feedback
Reader Opinion