CoWare Launches New Modeling Solution for Platform-Driven ESL Design.SAN JOSE, Calif. -- New Standards-Based Modeling Library for SystemC and Enhanced ConvergenSC Tools; Ease Development and Accelerate Reuse of TLM TLM Telemetry TLM Transaction Level Modeling TLM Tout Le Monde (French) TLM The Leprosy Mission (Northern Ireland) TLM Transmission Line Matrix TLM The Little Mermaid (fairy tale) Platforms Across the System Design Process CoWare(R) Inc., the leading supplier of electronic system-level (ESL (1) An earlier family of client/server development tools for Windows and OS/2 from Ardent Software (formerly VMARK). It was originally developed by Easel Corporation, which was acquired by VMARK. ) design software and services, announced a new standards-based modeling solution for platform-driven ESL design with the new release of CoWare ConvergenSC(R). Platform-driven ESL design refers to the development and practical reuse of a SystemC transaction-level model of a system-on-chip (SoC) platform throughout the system design process. CoWare's new modeling solution consists of a new standards-based modeling library for SystemC transaction-level modeling (TLM) and ConvergenSC tools that ease development and accelerate reuse of platform models across design tasks. This results in much higher ROI (Return On Investment) The monetary benefits derived from having spent money on developing or revising a system. In the IT world, there are more ways to compute ROI than Carter has liver pills (and for those of you who never heard of that expression, it means a lot). per project and platform than ad hoc modeling efforts. The ConvergenSC product family provides the most complete system-level design solution for SystemC on the market. "We are using CoWare's SystemC solution to analyze the system performance of our next-generation, multi-core digital TV SoCs," stated Dr. Naoyuki Kai, chief specialist, Visual System Digital LSI LSI: see integrated circuit. (Large Scale Integration) Between 3,000 and 100,000 transistors on a chip. See SSI, MSI, VLSI and ULSI. Design Group, Toshiba Semiconductor, Kawasaki, Japan. "Determining the right architecture for a multi-core SoC design, where thousands of interconnect and memory subsystem variations are possible, cannot be done using RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; . We are committed to SystemC transaction-level design and ESL for architectural exploration and performance analysis, and will use CoWare going forward." "More and more, designers are using recognized SystemC standards to model multi-processor SoCs at a higher level of abstraction The level of complexity by which a system is viewed. The higher the level, the less detail. The lower the level, the more detail. The highest level of abstraction is the single system itself. and to manage complexity," said A.K. Kalekos, vice president, marketing and business development, CoWare. "To improve modeling productivity and increase reuse, these designers are turning to CoWare for the most complete solution for standards-based platform-driven ESL design." Removing a Major Roadblock The lack of reusable transaction-level models of user-defined SoC components has been a major roadblock to realizing the full benefit of ESL. CoWare's platform-driven ESL design solution addresses this problem, enabling multiple ESL design tasks, or use cases, to be performed with a reusable transaction-level model of the product platform. Shared models are rapidly developed and efficiently adapted during the design process to meet the needs of product architects, software developers, and hardware designers, all of whom rely on it to perform their parts of the design job. This results in significantly greater ROI. New Standards-Based SystemC Modeling Library The new SystemC Modeling Library (SCML SCML Santa Casa da Misericórdia de Lisboa (Portugal) SCML SystemC Modeling Library SCML Schottky-Contact Microstrip Line SCML Subreality Cafe Mailing List SCML Supplier Custom Module List SCML Supply Chain Modeling Language ), along with modeling guidelines and source code examples now available from CoWare, provide the infrastructure for user-defined, highly-reusable TLM peripheral models. SCML helps separate TLM communication, storage, timing, and behavior within the peripheral model, making code more modular and more efficient to develop and test. Models can be defined simply and annotated for timing when needed. Unlike proprietary modeling approaches, SCML is based on current IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields. SystemC, Open SystemC Initiative (OSCI), and Open Core Protocol International Partnership (OCP-IP) standards, helping protect the user's modeling investment. In addition, new TLM platform examples and transactors come standard with ConvergenSC to make learning easier and provide a starting point for design. Enhanced Tool Capability Provided with ConvergenSC Unlike proprietary ESL toolsets, ConvergenSC provides a native SystemC tool architecture, openly supporting the multiple levels of abstraction required for platform-driven ESL design. This enables reuse of user-defined SCML peripherals across design tasks and in combination with the broadest range of SystemC processor and on-chip intellectual property (IP) available today. New ConvergenSC tool capabilities combine with SCML to make the development, debug, and architecture exploration of SystemC TLM platform models even more productive, including: --Graphical viewing of SystemC events, thread activations, and TLM interface method calls for enhanced debug visibility --Dynamic run-time configuration of platforms for rapid architectural exploration --Support for the IEEE 1666 SystemC Language Reference Manual (LRM LRM Language Reference Manual LRM Casa De Campo, Dominican Republic (Airport Code) LRM Long Range Missile LRM Line Replaceable Module LRM Local Resource Manager LRM Line-Reflect-Match LRM Land Resources Management ) standard. Availability CoWare ConvergenSC Platform Architect and Model Designer, including SCML, are new products that are available today. About CoWare CoWare is the leading supplier of electronic system-level (ESL) design software and services. CoWare offers a comprehensive set of ESL tools that enable SoC developers to "differentiate by design" through the creation of system IP including embedded processors, on-chip buses, and DSP algorithms; the architecture of optimized SoC platforms; and hardware/software co-design. The company's solutions are based on open industry standards including SystemC. CoWare's customers are major systems, semiconductor, and IP companies in the market where consumer electronics, computing, and communications converge. CoWare's corporate investors include ARM Ltd. (LSE LSE - Language Sensitive Editor :ARM) (Nasdaq:ARMHY), Cadence Design Systems (company) Cadence Design Systems - A company that sells electronic design automation software and services. http://cadence.com/. See also Verilog. (Nasdaq:CDNS CDNS Cadence Design Systems, Inc (stock symbol) CDNS Climatological Data National Summary CDNS Command Data Network System CDNS Customer and Data Network Services (Sprint) ), STMicroelectronics (NYSE NYSE See: New York Stock Exchange :STM (Scanning Tunneling Microscope) A microscope that can image down to the atomic level. An STM uses a piezoelectric tube with a tiny sharp tip at the end that is moved within nanometers of the object being sampled. ), and Sony Corporation (NYSE:SNE). CoWare is headquartered in San Jose, Calif., and has offices around the world. For more information about CoWare and its products and services visit http://www.coware.com. ConvergenSC and CoWare are registered trademarks of CoWare, Inc. All other trademarks are the property of their respective owners. |
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