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CoWare Extends LISATek Product Line; New Release Adds CoWare N2C Support, Memory Exploration and Macro Assembler Capabilities.


Business Editors/High-Tech Writers

SAN JOSE San Jose, city, United States
San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850.
, Calif. and MUNICH, Germany--(BUSINESS WIRE)--March 3, 2003

CoWare(TM), Inc. announced today new versions of their LISATek(TM) EDGE(TM) Processor Designer, RIM(TM) Software Designer and HUB(TM) System Integrator tools. The new release includes support for an optimized integration with the CoWare N2C(R) design environment. The LISATek and CoWare APIs have been optimized so as to deliver significant increase in simulation performance. CoWare, the leading supplier of system-level electronic design automation (EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. ) software, recently acquired LISATek, Inc., a company noted for automating the creation and modeling of embedded processors for system-on-chip (SoC) designs.

This latest release of the LISATek product line will be demonstrated at the Design Automation and Test in Europe Design Automation and Test in Europe, or DATE is a yearly conference on the topic of electronic design automation. It is typically held in March or April of each year, alternating between France and Germany.  (DATE) Conference, March 4-6, 2003, Stand #F5 at Messe Munich, Germany. This will be the first public forum where CoWare will demonstrate the newly integrated solution.

"We've created a powerful offering in joining LISATek with CoWare," affirms Andreas Hoffmann, director of engineering in CoWare's Aachen, Germany office. "Our integrated solution brings us closer to solving key challenges in designing SoCs and embedded processors by providing multi-processor simulation and debugging, processor modeling and platform optimization."

In addition to the optimized integration with CoWare N2C, the new release includes Memory Explorer which lets system designers explore, analyze and change the configuration of caches, buses and memories during complied simulation runs. The compiled ISS ISS

See Institutional Shareholder Services (ISS).
 model allows for the optimization of the memory subsystem, a critical component for the performance of any embedded system Any electronic system that uses a CPU chip, but that is not a general-purpose workstation, desktop or laptop computer. Such systems generally use microprocessors, or they may use custom-designed chips or both. . This optimization can be done utilizing a high-speed compiled ISS model based on the patent-pending Just-in-Time Cache Compiled Simulation (JIT-CCS) technology. In addition, JIT-CCS enables the user to boot an operating system operating system (OS)

Software that controls the operation of a computer, directs the input and output of data, keeps track of files, and controls the processing of computer programs.
 using the compiled ISS. This technology supports self-modifying code In computer science, self-modifying code is code that alters its own instructions, whether or not it is on purpose, while it is executing.

Self-modifying code is quite straightforward to write when using assembly language (taking into account the CPU cache).
 typical of RTOSs combined with the speed of compiled simulation.

The LISATek Macro Assembler An assembly language that allows macros to be defined and used. , announced in this release, provides features similar to a high-level programming language A high-level programming language is a programming language that, in comparison to low-level programming languages, may be more abstract, easier to use, or more portable across platforms. , including complex macros that can be called like processor instructions. Joined with high-level control flow statements, CoWare's LISATek Macro Assembler will greatly enhance embedded software development efficiency.

Pricing and Availability

Licenses for CoWare's LISATek products begin at $50,000. They run on the Sun Solaris, Linux and Windows NT/2000 operating systems and are available now.

Contact Pete Hardee, CoWare's director of product marketing, for more details. He can be reached via email at pete@coware.com or at (408) 392-8514.

About LISATek Product Line

The CoWare LISATek technology is based on Language for Instruction Set Architecture (LISA The first personal computer to include integrated software and use a graphical interface. Modeled after the Xerox Star and introduced in 1983 by Apple, it was ahead of its time, but never caught on due to its $10,000 price and slow speed. ), a single description language and is an extension to C/C C/C Center to Center
C/C Combustion Chamber
C/C Command/Control
C/C Crew Chief
C/C cabin cruiser (US DoD)
C/C chief complaint (medical)
C/C Channel-to-Channel
C/C Communication and Collaboration
++. EDGE Processor Designer facilitates the modeling and design of embedded processors, including microcontrollers (uCs), digital signal processors (DSPs), network processors (NPUs) and application specific processors (ASIPs). It enables processor exploration and automatically facilitates interactive design editing. RIM Software Designer is a set of software development tools generated using EDGE and includes a simulator using JIT-CC(TM), a macro-assembler, linker, archiver, disassembler Software that converts machine language back into assembly language. Since there is no way to easily determine the human thinking behind the logic of the instructions, the resulting assembly language routines and variables are named and numbered generically (A001, A002, etc.).  and debugger. HUB System Integrator enables hardware designers to integrate and verify Embedded Processors generated by EDGE into a SoC environment. Designers are able to debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits.  multiple processor cores simultaneously.

About CoWare

CoWare is the leading supplier of system-level electronic design automation (EDA) software and services for system-on-chip (SoC) designers. CoWare is revolutionizing SoC and embedded software development by enabling customers to create design platforms that can be rapidly optimized to meet specific market needs. SoC designs consisting of embedded processors and software, busses, memory, new and reused proprietary IP, are created and verified using the CoWare N2C system-level design environment and the LISATek software tools. CoWare's design environment utilizes open, standard languages such as C and SystemC (C++), and interfaces with popular third-party tools from Cadence, Synopsys and Mentor. CoWare software is employed today by major systems, intellectual property (IP) and semiconductor companies, including ARM, Canon, Fujitsu, Matsushita, Motorola, Samsung, Sony, ST Microelectronics, Toshiba and Xilinx. For the second year, the San Jose Business Journal has recognized CoWare as one of the fastest-growing private companies in Silicon Valley. For more information, visit www.CoWare.com.

CoWare, JIT-CC, LISATek, EDGE, RIM, and HUB are trademarks and CoWare N2C is a registered trademark of CoWare, Inc.
COPYRIGHT 2003 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2003, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Geographic Code:1USA
Date:Mar 3, 2003
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