CoWare Expands LISATek Embedded Processor Design Tools With C Compiler and RTL Generation.Business Editors/High-Tech Writers DATE04 PARIS--(BUSINESS WIRE)--Feb. 16, 2004 New Release Adds C Compiler to Automatically Generated Software Tools and Facilitates Implementation of New Custom Processors CoWare(R) Inc., the leading supplier of system-level electronic design automation (EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. ) software and services, announced major new functionality in its LISATek suite of products. LISATek is a fully integrated solution for embedded processor modeling, design, and software tool generation, based on the LISA The first personal computer to include integrated software and use a graphical interface. Modeled after the Xerox Star and introduced in 1983 by Apple, it was ahead of its time, but never caught on due to its $10,000 price and slow speed. 2.0 language. With the latest release, embedded processor designers are able to model their processor using a high level language, and automatically generate Instruction Set Simulators (ISSs) and a complete set of associated software tools including the associated C compiler. Custom processors, such as Application Specific Instruction Processors (ASIPs) for DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive and control applications, are also enabled by the automatic generation of synthesizeable Register Transfer Level (RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; ) code. Increasingly, companies are deciding to create their own programmable IP, typically embedded processors or ASIPs, because these devices provide the necessary flexibility for performing algorithmic acceleration, with the added benefit of easier re-use for derivatives or other projects. The problem they face is the cost and time taken to develop the necessary ISS ISS See Institutional Shareholder Services (ISS). and software development tools required. "Historically, fixed hardware has been used to implement acceleration engines for speeding up certain algorithms -- MPEG (Moving Pictures Experts Group) An ISO/ITU standard for compressing digital video. Pronounced "em-peg," it is the universal standard for digital terrestrial, cable and satellite TV, DVDs and digital video recorders (DVRs). 4 for example -- but more programmability is needed in today's SoCs," said Mark Milligan, vice president of marketing, CoWare. "Using a software programmable engine designed with LISATek enhances the flexibility and reusability of the design." The LISATek suite of tools includes Processor Designer for the creation of processor IP simulation models and their software development tools; C Compiler Designer for the creation of custom C compilers; and Processor Generator for producing RTL implementation code for the processor hardware. Using the latest release of LISATek, processor designers begin by describing the instruction-set and micro-architecture of a processor using the LISA 2.0 language. They can then generate both the ISS and assembler/linker/debugger for their embedded processors automatically, saving significant time and costs. The LISATek C Compiler Designer allows users to create a C compiler for their embedded processor, completing the software development tools. The tool uses the same LISA 2.0 processor description, together with a graphical user interface graphical user interface (GUI) Computer display format that allows the user to select commands, call up files, start programs, and do other routine tasks by using a mouse to point to pictorial symbols (icons) or lists of menu choices on the screen as opposed to having to , to provide the necessary inputs. C Compiler Designer is based on CoSy Express technology from ACE Associated Compiler Experts bv (www.ace.nl). C Compiler Designer significantly reduces C compiler development time from man-years to man-weeks, facilitating reuse of the processor and software development tools in multiple projects. Using the new and extended C/C C/C Center to Center C/C Combustion Chamber C/C Command/Control C/C Crew Chief C/C cabin cruiser (US DoD) C/C chief complaint (medical) C/C Channel-to-Channel C/C Communication and Collaboration ++ Graphical Debugger in LISATek, the model can be quickly simulated and debugged to ensure that correct functionality has been achieved, reducing time needed to identify software bugs on single and multiple processor platforms. The processor can be further optimized through simulation profiling, to understand and remove any performance bottlenecks and achieve the optimum architecture. Because the C compiler and RTL code are automatically generated, changes made to the processor while optimizing it -- such as adding a new instruction -- are easily coded in LISA 2.0, and the changes then automatically reflected in the C compiler and RTL implementation code. Once the design is completed, synthesizable RTL code is generated by the LISATek Processor Generator option, providing Verilog, VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. , and SystemC code. There are CoWare patents pending on both C compiler generation and RTL generation technologies. Pricing and Availability LISATek 2004.1 will be available in production release in March 2004. For pricing information, contact your local sales office or email sales@coware.com. For more information, visit www.coware.com or contact John MacDermott, director, business development, at johnm@coware.com. About CoWare CoWare is the leading supplier of system-level electronic design automation (EDA) software tools and services. CoWare offers a comprehensive set of electronic system-level (ESL) tools that enable SoC developers to "differentiate by design" through the creation of system-IP including embedded processors, on-chip buses, and DSP algorithms; the architecture of optimized SoC platforms; and hardware/software co-design. The company's solutions are based on open industry standards including SystemC. CoWare's customers are major systems, semiconductor, and IP companies in the market where consumer electronics, computing, and communications converge. CoWare's corporate investors include ARM Ltd. (LSE LSE - Language Sensitive Editor :ARM)(Nasdaq:ARMHY), Cadence Design Systems (company) Cadence Design Systems - A company that sells electronic design automation software and services. http://cadence.com/. See also Verilog. (NYSE NYSE See: New York Stock Exchange :CDN (Content Delivery Network) A system of distributed content on a large intranet or the public Internet in which copies of content are replicated and cached throughout the network. ), STMicroelectronics (NYSE:STM (Scanning Tunneling Microscope) A microscope that can image down to the atomic level. An STM uses a piezoelectric tube with a tiny sharp tip at the end that is moved within nanometers of the object being sampled. ), and Sony Corporation (NYSE:SNE). CoWare is headquartered in San Jose, Calif., and has offices around the world. For more information about CoWare and its products and services, visit http://www.coware.com. LISATek and ConvergenSC are trademarks of CoWare, Inc. CoWare is a registered trademark of CoWare, Inc. in the United States. All other trademarks are the property of their respective owners. |
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