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Co-Design Automation, Verplex Continue Cooperation On SUPERLOG Assertions, Ink Licensing Agreement.


Business/Technology Editors

SAN JOSE, Calif.--(BUSINESS WIRE)--March 11, 2002

International HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards.  Conference

Verilog-Based Constructs Link Simulation,

Model Checking to Improve Verification Throughput

Co-Design Automation Inc., a provider of next-generation system simulation products, today licensed the Design Assertions Superset A group of commands or functions that exceed the capabilities of the original specification. Software or hardware components designed for the original specification will also operate with the superset product. However, components designed for the superset will not work with the original.  (DAS) of its SUPERLOG(R) design and verification language to Verplex Systems, Inc. This move is designed to aid both companies' efforts to drive a common assertion standard with practical user experience.

Verplex worked with Co-design Automation on the requirements for the DAS and contributed time and resources in its definition. The announcement coincides with Co-Design Automation's announcement today that it, together with Real Intent, Inc., donated the DAS to Accellera, an electronics industry standards organization.

The SUPERLOG DAS enables designers and verification engineers to insert properties in HDL models and testbenches, and then to use them across a range of tools without rewriting them, dramatically simplifying testbenches while improving verification productivity. SUPERLOG provides a mechanism to efficiently and easily describe design properties using a recognizable Verilog hardware description language (language) Hardware Description Language - (HDL) A kind of language used for the conceptual design of integrated circuits. Examples are VHDL and Verilog.  (HDL)-based syntax, for use throughout the design and verification flow.

"The SUPERLOG DAS represents a powerful mechanism to drive multiple verification capabilities, utilizing a style that will broadly appeal to Verilog users," notes Harry Foster, chief architect at Verplex. "Complimenting the Open Verilog Library format already in use, the language capabilities contained within the DAS promise significant verification productivity improvements."

"Designers need a way to quickly move between model checking and system simulation to verify their designs, without rewriting test specifications for each tool," affirms Simon Davidmann, Co-Design Automation's chief executive officer (CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. ). "We are delighted to license the DAS to Verplex, and consider this a major move toward the creation of a comprehensive standard in this key verification area."

For more details on SYSTEMSIM and DAS, contact Dave Kelf, Co-Design Automation's vice president of marketing. He can be reached via email at davek@co-design.com or at (877) 6 CODESIGN CODESIGN Cooperative Activity in the Area of System Design and Hardware/Software Co- , Ext. 404.

About Co-Design Automation

Co-Design Automation is an EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board.  company focused on the efficient creation, implementation, and verification of system on chip (SOC) designs. It is privately held and funded by investors from within the EDA developer and user communities, including Intel Capital Corporation and Redwood Venture Partners, Inc. The staff includes notable simulation experts Phil Moorby, creator of the Verilog HDL and the first fellow at Cadence Design Systems (company) Cadence Design Systems - A company that sells electronic design automation software and services.

http://cadence.com/.

See also Verilog.
, Inc. (NASDAQ NASDAQ
 in full National Association of Securities Dealers Automated Quotations

U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on
: CDN (Content Delivery Network) A system of distributed content on a large intranet or the public Internet in which copies of content are replicated and cached throughout the network. ), and Peter Flake, creator of the HILO Hilo (hē`lō), city (1990 pop. 37,808), seat of Hawaii co., on Hilo Bay of Hawaii island; settled by missionaries c.1822, inc. as a city 1911.  HDL. In 1999, Co-Design announced the SUPERLOG system design language, now utilized by 15 partner companies. Its products -- SYSTEMSIM and SYSTEMEX -- are achieving success throughout the electronics industry worldwide in system platform and advanced verification applications. Corporate headquarters is in Los Altos, Calif. Telephone: (877) 6 CODESIGN. Facsimile: (408) 273-6025. Email: info@co-design.com. On-line information is found at its Web Sites: http://www.co-design.com and http://www.superlog.org.

SUPERLOG is a registered trademark and SYSTEMSIM, SYSTEMEX, CBlend are trademarks of Co-Design Automation, Inc. Verilog is a trademark of Cadence Design Systems, Inc. Co-Design Automation acknowledge trademarks or registered trademarks of other organizations for their respective products and services.
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Publication:Business Wire
Date:Mar 11, 2002
Words:514
Previous Article:Co-Design Automation & Real Intent Steer Industry-Wide Convergence On Assertions Through Accellera Donation.
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