Clear Logic Secures $12 Million in Private Equity Financing; 40% Growth Exceeding Expectations.

Business Editors/High-tech Writers

SAN JOSE, Calif.--(BUSINESS WIRE)--June 12, 2000

Clear Logic, Inc. today announced that it has secured nearly $12 million from a private placement of equity securities.

Clear Logic CFO Albert Pun announced: "This funding positions us to accomplish our goals for the next year. Long term, our FPGA-based ASIC design flow offers a compelling business proposition. Short term, our Altera pin-compatible families are experiencing quarterly sequential growth that will likely exceed 40% for 2Q00 versus our original 20 - 30% growth target. The strength of our long term position, plus stronger than anticipated current results allowed us to increase the size and price of our funding, in spite of a difficult equity market.

"Our ability to execute this transaction in just seven weeks from term sheet to closing also reflects the strong support we have received from our founding partner, Integrated Device Technology (Nasdaq:IDTI). IDT's fully diluted ownership of Clear Logic is now 35%.

"Seligman Technology Group and Adam Smith & Company served as co-leads for the private placement. Additional new institutional investors include AsiaTech Ventures and H&Q Global Alliance. Clear Logic's employees and sales channel also gave a vote of confidence by purchasing 20% of the offering," Pun concluded.

Clear Logic CEO Al Huggins added, "This funding positions us to accelerate our penetration of the ASIC market. Many designs can't afford the high cost of programmable logic. We offer a new paradigm: Programmable logic for prototyping, Clear Logic for volume production

"Our goal is to hit a $40 million per year sales rate by the end of 2001. We are also taking steps to achieve our long term gross margin target of 60%," Huggins said. "Already, we have captured programs believed to represent over 15% of the dollar volume at Altera's largest customer, and we are saving our customers in excess of $8 million per year. We have aggressive objectives in the future. Currently, four families of Altera's programmable devices provide prototype capability for Clear Logic ASICs. By the end of next year, we will have developed new devices that are supported by four more families of Altera's programmable products.

"We provide a unique solution to a costly problem, and that is the basis of our success," Huggins explained. "Usually an ASIC design that has been prototyped in a programmable device must be redesigned to an ASIC format. Basic incompatibilities between FPGA and ASIC logic implementations generally require that the entire design be redone. ASIC designers also must engage in extensive test vector development efforts that can take months to complete. NRE charges for conventional ASICs can be over $100,000, and any error discovered in the masked-ASIC prototype would incur additional charges. This is a painful process.

"We make the process simple and cost effective. Using Clear Logic's ASIC design methodology, the ASIC prototype is done in an FPGA and it stays in the prototype FPGA until the designer is satisfied. Then the customer simply sends us the FPGA `bitstream' (the programming code) over the Internet and, within two weeks, we ship free sample ASICs that can be plugged directly into the customer's board. We are the only company offering this service."

Company Background

Clear Logic, Inc. is a fabless chip supplier and the world leader in the new market sector of FPGA compatible ASICs. Clear Logic was founded in May 1996 as a venture subsidiary of Integrated Device Technology (Nasdaq:IDTI). Clear Logic has successfully delivered designs to more than 100 customers. The company is located in San Jose, California. IDT is Clear Logic's principal foundry.

Clear Logic currently develops and markets pin compatible, application specific integrated circuits (ASICs) from prototypes implemented in Altera's popular MAX(R) 7000 and FLEX(R) 8000 lines of programmable logic devices. Having introduced its first Altera replacement product in 1998, Clear Logic has made substantial inroads at major Altera customers, most notably Alcatel, Cisco, Matsushita, and NEC among others.

Clear Logic ASICs have a proprietary coarse grained architecture that is naturally compatible with the logic architecture of programmable devices. As a result, Clear Logic ASICs can perform logic that has been implemented in a customer's FPGA bitstream in exactly the same way as the programmable device does. No other ASIC has this capability. Since the customization of Clear Logic ASICs is the last step in the manufacturing process, the company can deliver samples in two weeks, instead of the six to eight weeks usually required for an ASIC.

Clear Logic's ASIC architecture eliminates all of the transistors that programmable devices rely upon for programmability, while maintaining the same basic functionality. By doing this, and by applying additional silicon saving technologies, Clear Logic has cut the silicon area of its devices by 40% to 60% from that required for the same functionality in a programmable device. Clear Logic's lower prices are a direct result of the reduced die sizes of its devices. The exceptionally small die size of Clear Logic ASICs also permits the company to offer prices that are comparable to those of other ASIC implementations, without the associated NRE charges and design headaches.

Clear Logic is a registered trademark of Clear Logic. Altera, FLEX and MAX are registered trademarks of Altera Corporation. Clear Logic's World Wide Web site is www.clear-logic.com.

Forward Looking Statements

This information document contains forward-looking statements within the meaning of the federal securities laws. We intend such forward-looking statements to be covered by the safe harbor provisions for forward looking statements contained in the Private Securities Reform Act of 1995, and we include this statement for purposes of complying with these safe harbor provisions. Forward looking statements, which are based on certain assumptions and describe future plans, strategies, and expectations of our corporation, are generally identifiable by use of the words "believe," "expect," "intend," "anticipate," "estimate," "project", "roughly," "approximately," or similar expressions including use of the word "see" in the sense of "foresee" and other forward looking colloquialisms (including use of future affirmative conjugations, such as, for example, use of "will" in a non-contractual sense in place of the conditional "would", "could", or "might") consistent with mandates for "plain English" in financial documents.

In particular, all references to current and historical market share are estimates based on limited information, and forecasts of future market share and revenue objectives are targets. Clear Logic is a venture stage company operating in an historically volatile and fast changing industry, and these factors compound the difficulty in forecasting future events. Factors which could have a material adverse effect on our operations and future prospects include, but are not limited to, changes in: Economic conditions particularly within the electronics industry; competitive responses by Altera, Xilinx, or new, competing startup companies; court rulings regarding pending litigation with Altera or future litigation; manufacturing yields; supplier relations; new product development results; availability of financing. These risks and uncertainties, together with the other risks described from time to time in reports and documents we may file, should be considered in evaluating forward-looking statements, and undue reliance should not be placed on such statements.