Clear Logic Files Voluntary Petition for Relief.Business Editors SAN JOSE San Jose, city, United States San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850. , Calif.--(BUSINESS WIRE)--Jan. 7, 2002 On Jan. 4, 2002, Clear Logic, Inc. filed a voluntary petition for relief under Chapter 11 of the United States Bankruptcy Code in the United States Bankruptcy Court bankruptcy court n. the specialized Federal court in which bankruptcy matters under the Federal Bankruptcy Act are conducted. There are several bankruptcy courts in each state, and each one's territory covers several counties. for the Northern District of California, San Jose Division. The Chapter 11 filing was prompted, in large part, by the Company's pending litigation An action brought in court to enforce a particular right. The act or process of bringing a lawsuit in and of itself; a judicial contest; any dispute. When a person begins a civil lawsuit, the person enters into a process called litigation. with Altera Corporation. In this litigation Altera contends that customers who send a bitstream containing their design to Clear Logic are violating the Altera click-wrap software license agreement, and that Clear Logic has wrongfully interfered with these agreements. Clear Logic disputes Altera's contentions. For example, Altera and other FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. manufacturers have consistently promoted in their marketing literature the use of their software for third-party ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. development(1). Clear Logic intends to continue to prosecute the case vigorously, but believes that Chapter 11 protection will allow the Company to focus on its core operations pending the conclusion of the Altera litigation. "Clear Logic is currently analyzing several options which can be implemented to resolve its dispute with Altera while at the same time improving its cash flow and balance sheet," according to Leonard Perham, Clear Logic's CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. . "We intend to implement one or more of such options as soon as possible in order to allow Clear Logic to emerge from bankruptcy as a stronger reorganized company. Clear Logic's customers can assume that, while operating under the protection of the bankruptcy court, we will continue to ship existing and new orders on time every time." CFO See Chief Financial Officer. Mike Gumport added: "Clear Logic intends to pay our manufacturing vendors and employees in a timely fashion during the bankruptcy process. We received $10.5 million in financing in 2001, and, as a result, our cash on hand substantially exceeds our manufacturing payables. Importantly, we have received strong indications of support from our key financial backers and believe our decision to pursue reorganization will facilitate our access to additional capital. Currently, we are working to minimize any disruption to payment schedules and normal operations. Based on current backlog and order rates, another quarter of sequential revenue growth remains a reasonable expectation for 1Q02." Clear Logic is a fabless semiconductor manufacturer that provides low cost, no-NRE, automated FPGA-to-ASIC conversions. Through these conversions, customers achieve huge cost reductions for high volume production applications. Founded in 1996, the company has provided millions of dollars of savings for several of the largest suppliers of networking and telecommunications equipment. Company Background Clear Logic, Inc. is a fabless chip supplier and the world leader in a new market sector of FPGA compatible logic devices (FCLDs). Clear Logic's design conversion process is fully automated and patented. Clear Logic ASICs have a proprietary coarse grained architecture. As a result, Clear Logic ASICs can perform logic that has been implemented in a customer's design in exactly the same way as the programmable device does. No other ASIC has this capability. Since the customization of Clear Logic ASICs is the last step in the manufacturing process, the company can deliver samples in four weeks, instead of the eight weeks usually required for an ASIC. Clear Logic's ASIC architecture eliminates all of the transistors that programmable devices rely upon for programmability while maintaining the same basic functionality. By doing this, and by applying additional silicon saving technologies, Clear Logic has cut the silicon area of its devices by 40% to 60% from that required for the same functionality in a programmable device. Clear Logic's lower prices are a direct result of the reduced die sizes of its devices. The exceptionally small die size of Clear Logic ASICs also permits the company to offer prices that are comparable to those of other ASIC implementations, without the associated NRE (Non-Recurring Engineering) Refers to the cost of creating a new product, which is paid up front. Contrast with "production cost," which is ongoing and based on the quantity of material produced. charges and design headaches. Note to Editors: Clear Logic is a registered trademark of Clear Logic. Clear Logic's World Wide Web site is www.clear-logic.com. (1) See "LGIC LGIC Ligand Gated Ion Channels (cell signalling) LGIC Line Group ISDN Controller Uses FLEX Devices to Pioneer Broadband CDMA (Code Division Multiple Access) A method for transmitting simultaneous signals over a shared portion of the spectrum. The foremost application of CDMA is the digital cellular phone technology from QUALCOMM that operates in the 800 MHz band and 1.9 GHz PCS band. WLL See wireless local loop and PHS-WLL. System," Altera Corporation, 08/01/01 |
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