Clear Logic's Cl7128 LPLDs 20% Faster Than Altera EPM7128; First Pin-compatible MAX7000 Replacements Have 5 NS Delays, Cost 20% to 70% Less.

SAN JOSE, Calif.--(BUSINESS WIRE)--Aug. 2, 1999--

Clear Logic(TM), Inc. today introduced its 2,500 gate CL7128E and CL7128S low cost pin-compatible replacements for Altera(R)'s (NASDAQ:ALTR) MAX(R) EPM7128E and EPM7128S CPLDs. Ideally suited for volume production, the two new devices are the first MAX 7000 replacements to implement Clear Logic's Laser-Processed Logic Device(TM) (LPLD(TM)) technology, announced in November, 1998.

The fastest CL7128 devices have 5 ns delays -- 20% faster than the 6 ns offered by Altera's fastest 5 Volt EPM7128 devices. The faster delays make CL7128 LPLDs ideal for wireless communications applications such as routers and switches that require high throughput and use state logic to route data to different addresses. Networking and telecommunications applications having high speed data paths require exceptionally fast control of data routing with fast rise times and quick response to hold times. In these systems, even a 6 ns logic delay can create a bottleneck, slowing the data path. Clear Logic's 5 ns delays meet or exceed the requirements of these types of systems.

Fewer Transistors Lead to Faster Delays. The faster delays of Clear Logic's LPLD devices are a direct result of Clear Logic's LPLD technology. Clear Logic's laser-processed logic devices are not customer-programmable and, therefore, do not require any of the transistors that are required for programmability in Altera CPLDs. As a result, CL7128 devices have about 200,000 fewer transistors than Altera EPM7128 devices. This massive reduction in the number of transistors reduces the parasitic capacitance of CL7000 devices by 50% with the result that pin-to-pin delays are 20% faster than those of Altera MAX 7000 parts.

Smaller Die, Lower Prices - The lower transistor count of CL7128 LPLD also results in a die size reduction of 43%, allowing Clear Logic to deliver CL7128 products at prices that are 20% to 70% lower than Altera's.

Identical Logic Structures and Functionality. Clear Logic LPLDs use macrocell-based logic structures, similar to those in Altera MAX 7000 CPLDs. The result is that the two device families have identical functionality. Both families of devices have product term AND arrays, registers, and I/O control blocks. Logic signals are routed on the chip by a central interconnect array. The pin out and the I/O characteristics of both types of devices are identical. In fact, LPLDs will directly accept the programming files from Altera MAX 7000 designs without any modification.

Prototype CL7000 Devices Can Be Obtained by Emailing the Altera MAX 7000 Programming File to Clear Logic. Designers who want to take advantage of Clear Logic's faster delays and lower prices can email their Altera programming file or send a programmed Altera device to Clear Logic. Within two weeks, Clear Logic will deliver prototypes that are guaranteed to work identically to the Altera device, in the same socket.

Faster Delays for Less. According to Don Knowlton, Clear Logic's vice president of marketing, "Usually designers must pay much more for increased performance. In the case of our CL7128E and CL7128S devices, designers get significantly better performance for a substantially lower cost.

"Using a CL7128 LPLD to realize higher performance designs requires no customer-side effort, apart from doing the original design. We recommend that designers prototype and debug a 5 nsec design at room temperature and at 5.25V Vcc using a 6 nsec MAX EPM7128 CPLD. After that, they simply email us their programming file. Within two-weeks we deliver laser-processed prototype CL7128 parts that are guaranteed to work identically to the corresponding Altera device in the same socket, but with 5 nsec performance over the entire voltage and temperature range.

"Prices of CL7128 LPLDs with the same delays as Altera devices are significantly discounted from Altera's EPM7128 CPLDs, so there is a big cost saving if extra performance is not needed. Production quantities are delivered within four weeks - about the same amount of time required to get pre-programmed CPLDs from distribution," Knowlton added. "Frankly, every designer who's using an EPM7128E or EPM7128S CPLD should email his or her programming file to us today. There is absolutely nothing to lose and there are considerable advantages to be gained."

Laser-Processed Logic Devices. Apart from lower prices and faster delays, the main difference between MAX EPM7128 CPLDs and CL7128 LPLDs is that the Altera parts are user-programmable while the Clear Logic devices are laser-processed and not programmed by the user. Being factory-configured, LPLD devices have the additional benefit of eliminating the cost of programming large quantities of CPLDs for production use. Clear Logic's Laser Processed Logic Device Technology includes the following:

The unique LPLD architecture that supports unmodified MAX 7000 programming files, but requires many fewer transistors;

Clear Shot(TM) extraction software that converts the MAX 7000 programming file into laser configuration instructions in less than an hour, freeing designers of any customer-side engineering;

No Fault(TM) test technology that uses embedded test circuitry with automatically generated test vectors, based on the customer's actual logic implementation, to achieve 100% fault coverage.

Laser fuses are used to configure the Clear Logic devices. Laser fuses are smaller than, and have less capacitance than transistors, and they draw no power. As a result, CL7128 devices have half as much parasitic capacitance as comparable Altera devices, resulting in faster delays and lower power consumption. The CL7128 die is about half the size of the Altera die, allowing substantially lower prices.

The lower transistor counts of Clear Logic's LPLDs are realized by architectural innovations:

Laser-configured Interconnect Array - Altera's MAX 7000 Programmable Interconnect Array (PIA) requires eleven transistors to configure each PIA connection point. A large EEPROM storage element contains seven transistors for programing and data storage. An additional four transistors control bus contention by holding the signal off during power up. One transistor is used for the actual row and column connection.

Clear Logic's LPLD architecture has no transistors in the interconnect array. Once a MAX 7000 design is complete, and the device configuration is embedded in the MAX 7000 programming file, neither the EEPROM elements nor the configuration transistors are needed because device programmability is unnecessary. Appropriate metal fuses are cut to achieve functionality that is identical to the MAX 7000 CPLD without using configuration transistors. As a result Clear Logic's laser-configured interconnect array (LIA) requires 72% less silicon area than does Altera's MAX 7000 programmable interconnect array (PIA).

Product Term AND Array - In the MAX 7000 AND array, an EEPROM-based circuit with six transistors is required to configure each input term in the MAX 7000 AND array. One set of three transistors controls the signal while a second set of three transistors controls the inverted signal. As with the LIA, the programming file has all the information about the configuration of the AND array input terms. As a result, the input term configuration can be implemented by configuring only three laser fuses, eliminating the need for all but a single transistor for the actual logic function. This 83% reduction in the transistor count in the CL7128 AND array reduces its silicon area 55% from that of the MAX EPM7128.

EPM7128 Programming Files Converted to Laser Instructions - Clear Logic transforms MAX 7000 programming files into laser-configuration instructions at the factory, using its ClearShot(TM) extraction software. At the time of data extraction, test vectors are generated automatically, based on the customer's MAX 7000 programming file. These test vectors, combined with extensive test circuitry embedded in the CL7000 architecture, allow Clear Logic to achieve 100% fault coverage. The entire process takes less than an hour and involves no customer-side engineering.

Prototypes are packaged domestically and shipped in two weeks. Production quantities are delivered within four weeks - about the same amount of time required to receive pre-programmed MAX 7000 CPLDs from distribution.

Clear Logic does not charge customers for design conversion. Thus, there is absolutely no risk associated with using a CL7000 LPLD to replace Altera MAX 7000 CPLDs.

Pricing, Packaging & Availability - In addition to the faster 5 ns speed grades, CL7128E and CL7128S LPLDs are available now in the same packages and speed grades as Altera CPLDs. Clear Logic intends to offer CL7000 replacements for all MAX 7000E and MAX 7000S CPLDs with 128 or more macrocells during 1999.

When ordered in quantities of 50,000 units or more, 5 nsec versions of the CL7128S will be available for as low as $4.90 in the first half of the year 2000. Slower versions of the CL7128S are available now for $3.90 in 50,000 unit quantities.

Clear Logic, Inc. was founded in 1996 to offer a no-NRE, quick turn-around cost reduction path for designs that have been implemented using Altera programmable logic products. The company employs proprietary software that converts the programming file from an Altera design to a laser-configured device. Clear Logic has no NRE charges or minimum order sizes. Called Laser-Processed Logic Devices or LPLDs, Clear Logic devices are comparable to pre-programmed CPLDs, with comparable delivery lead times. They arrive at the customer's site fully pre-configured and ready to plug in the socket. Clear Logic LPLD devices are guaranteed to function identically to their programmable counterparts. Clear Logic's World Wide Web site is www.clear-logic.com.

Integrated Device Technology, Inc. (NASDAQ:IDTI) is a major investor in Clear Logic.

Clear Logic, LASIC, LPLD, ClearFire, ClearShot, and NoFault are trademarks of Clear Logic. Altera and MAX are registered trademarks of Altera Corporation.