Circuit Semantics Partners With Leading Japanese, Korean and Taiwan Distributors to Provide Sales and Support for Asian IC Designers.

Business Editors/High Tech Writers

SAN JOSE, Calif.--(BUSINESS WIRE)--Aug. 14, 2000

Circuit Semantics, today announced it has partnered with ITOCHU Techno-Science Corporation of Japan, LOGICMECA Co., LTD in Korea, and HwaCom Systems Inc. in Taiwan as its regional representatives. These firms will provide local business, sales, and marketing development and support to Asian companies in involved in the design of high-performance semiconductors.

"Japan, Korea and Taiwan are very important markets in the high-performance design world," stated Gary Larsen, chief executive officer of Circuit Semantics. "With the rapid move to system-level ICs, especially among the Asia semiconductor suppliers, we are finding that there is a growing need for the level of timing accuracy our tools provide. These leading distributors will provide the direct, daily contact we need to better serve our customers and to help us broaden our Asian business relationships."

These three distributors were chosen because of their demonstrated success launching and supporting similar sophisticated, leading-edge companies in Asia such as Siebel Systems, Synchronicity Inc., and Ultima Interconnect Technology. Additionally these firms bring the ideal combination of technical and business expertise that our customers require. We have also found that many of our customers in Asia hold these firms in very high regard. This is extremely important to us since our business model is predicated on building long-term partnerships within Asia."

"We're really excited to be able to partner with Circuit Semantics," said K. C. Park, president of LogicMecica in Korea. The local market for the characterization of hard IP, cores, and macro blocks is growing extremely fast in Korea. The semiconductor suppliers like Samsung and Hyundai in Korea have traditionally focused on the DRAM segment of the business in the past. However, they recognize the importance of the system-on-a-chip (SoC) IC business and are increasing their support for this segment of the IC market. The smaller, local semiconductor suppliers in Korea have already been instrumental in the silicon success of SoC designs. Circuit Semantics has the solutions that support the characterization and static timing analysis of high performance SoC components whether at the cell, macro block, IP, or full chip SoC level."

"We are excited to be partnering with Circuit Semantics in providing static timing analysis, and core and block characterization solutions, to the Japanese semiconductor market," said Shinji Iyobe, General Manager of the EDA Solution Department for ITOCHU Techno-Science Corporation. "The market for timing and characterization solutions for high performance cells, cores, and blocks is growing at an exceptional rate in Japan, especially in the area of microprocessors and communications devices for system-level IC designs. Many semiconductor suppliers in Japan have told us that they are expecting Circuit Semantics' products such as DynaCore, DynaCell and DynaModel to provide the solutions that will allow them to succeed with their high performance system-level IC designs."

"We are very pleased to have the opportunity to bring Circuit Semantics to the Taiwan market," said George Chou, director of HwaCom Systems, Inc. "The leading-edge foundries are pushing their customers hard for advanced process technology migration. Today's customers have no choice but to quickly build up the required timing and characterization solutions for high-performance design flow. Various design elements like cells, cores and blocks are all involved and have to be accurately characterized in order to enable the implementation of a complex SoC methodology."

About Circuit Semantics

Circuit Semantics, Inc. provides timing and characterization solutions for high performance cells, cores, and blocks based on innovative technology for which patents are currently pending. IC designers employ these mixed-level solutions to create high-performance chips using full-custom and structured-custom methodologies. The company's products support precise, gate-level abstraction of transistor-level circuits to accelerate timing closure for designs fabricated in deep submicron (DSM) process technologies. These solutions are especially well suited for the microprocessor, digital signal processing, graphics and the high-speed communications markets. Circuit Semantics is headquartered at 2590 North First Street, Suite 301, San Jose, California 95131, telephone [phone]; fax [phone]. For more information, visit www.circuitsemantics.com.