Circuit Semantics Joins Synopsys in-Sync Interoperability Program; Circuit Semantics Characterization and Modeling Technology to Use Liberty Open Library Standard.

Business Editors/High-Tech Writers

SAN JOSE, Calif.--(BUSINESS WIRE)--Feb. 7, 2003

Circuit Semantics, Inc. (CSI), a provider of next generation modeling and characterization solutions for high-performance integrated circuit (IC) design, today announced that it has joined the Synopsys in-Sync(R) program. Circuit Semantics(R)' participation in the in-Sync program and its use of Synopsys' Liberty(TM) open library standard will facilitate the interoperability of Circuit Semantics' DynaCell(R) characterization and modeling tool for standard cells, IOs, and custom cells with Synopsys' Design Compiler(TM) synthesis platform and Library Compiler(TM) single library solution. Circuit Semantics' support for Liberty will include characterization for advanced signal integrity features in Liberty such as noise modeling and Scalable Polynomial Delay Modeling (SPDM).

"Supporting Liberty allows us to support numerous electronic design automation tools based on Liberty throughout the industry. When working with our characterization and modeling technology, customers can improve their engineering productivity and the performance and reliability of their nanometer designs," stated Jose Torres, Circuit Semantics' vice president of marketing. "We are glad to join the Synopsys in-Sync program as our membership facilitates the interoperability of our products to produce the best possible results for our mutual customers."

"Synopsys is committed to enabling tool interoperability for system-on-chip (SoC) designs through programs like in-Sync," said Karen Bartleson, director of quality and interoperability at Synopsys, Inc. "A smooth, interoperable flow between Circuit Semantics and Synopsys tools allows designers to focus on designs, not interfaces, resulting in enhanced integrated circuit (IC) design productivity."

About Circuit Semantics, Inc.

Circuit Semantics, Inc. provides timing and characterization solutions for high performance cells, cores, and blocks based on innovative and patented technology. IC designers employ these mixed-level solutions to create high-performance chips using full-custom and structured-custom methodologies. The company's products support precise, gate-level abstraction of transistor-level circuits to accelerate timing closure for designs fabricated in deep submicron (DSM) process technologies. These solutions are especially well suited for the microprocessor, digital signal processing, graphics, and high-speed communications markets. Circuit Semantics is headquartered at 2590 North First Street, Suite 301, San Jose, California 95131, telephone [phone]; fax [phone]. For more information, visit www.circuitsemantics.com.

Note to Editors: Circuit Semantics and DynaCell are registered trademarks of Circuit Semantics, Inc. in-Sync and Synopsys are registered trademarks of Synopsys, Inc. Design Compiler and Liberty are trademarks of Synopsys, Inc.