Chronologic VCS 3.1 Increases Accurate Gate-Level Performance By 2 To 5 Times.MARLBORO Marlboro or Marlborough (märl`bərō), city (1990 pop. 31,813), Middlesex co., E Mass.; settled on the site of a Native American village 1657, inc. as a city 1890. , Mass.--(BUSINESS WIRE)--Sept. 30, 1996--Viewlogic Systems, Inc. (NASDAQ NASDAQ in full National Association of Securities Dealers Automated Quotations U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on :VIEW) today introduced the Chronologic VCS (1) (Verilog Computer Simulator) See Verilog. (2) (Version Control System) See version control. 3.1 simulator, an even faster version of what was already the industry's fastest Verilog simulator. VCS gained its reputation on the performance of its Register Transfer Level (RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; ) simulation. VCS 3.1 now adds to that performance by offering the industry's fastest software gate level simulation along with increased accuracy for modeling deep submicron delays. For gate level simulation with timing, VCS 3.1 runs two to five times faster than VCS 3.0. VCS 3.1 achieves faster gate-level simulation by improving the evaluation of timing models in the design. This is accomplished by performing optimizations on a "global" basis, rather than instance-by-instance. The automatic module inlining capability of VCS presents the global optimizer with significantly more optimization opportunities, resulting in faster and more memory efficient simulation. "In order to reduce the total design turnaround time (1) In batch processing, the time it takes to receive finished reports after submission of documents or files for processing. In an online environment, turnaround time is the same as response time. , we have systematically identified and removed many compile-time bottlenecks," said Peter Eichenberger, Chief Technologist for Chronologic VCS. "As a result, the speed of the VCS compiler has been improved dramatically. Designers can now use VCS very effectively for debugging both RTL and gate level designs." This new capability of VCS was confirmed by Ira Chayut, Director of Logic Design and System Verification at Weitec, which is one of the beta sites for VCS 3.1. According to according to prep. 1. As stated or indicated by; on the authority of: according to historians. 2. In keeping with: according to instructions. 3. Mr. Chayut, "The new version of VCS cut our full system compile times down from 5 hours to an amazing 22 minutes. This means we can now use VCS in a whole new way." For accurate simulation of the wire delays that dominate up to 80% of all the delays in deep submicron designs, VCS now supports the modeling of transport and multi-source interconnect delays. As a feature that leads the IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields. Verilog standard, VCS uses a proprietary algorithm which has been refined based on the requirements of leading ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. vendors. "VCS 3.1 offers the highest performance and capacity as well as the accuracy required for sign-off of very deep submicron designs" said Ghulam Nurie, Director of Simulation Marketing. "With the growing sign-off support from leading ASIC vendors, we now have a simulator that meets the complete design and verification requirements from RTL to gate level sign-off. Our customers see great productivity gains with the performance and capacity advantage offered by VCS." "I like VCS because its compiled code approach uses dramatically less runtime memory than the interpreted Verilog simulator," says Mike Murray, CAE (1) (Computer-Aided Engineering) Software that analyzes designs which have been created in the computer or that have been created elsewhere and entered into the computer. manager at Acuson Corporation. "Our desktop engineering workstations have 64-128 MB of DRAM, which enables us to run large board level simulations on the desktop and reduce the load on our compute server. VCS saves us from having to buy extra memory for these machines. With VCS 3.1, we are seeing major performance improvement at the gate level. In one benchmark, for example, we ran 493,000 vectors in a timing simulation of a post-routed ASIC design. VCS 3.1 performed three times faster than the previous version and finished several hours ahead of the interpreted simulator." VCS 3.1 is a maintenance upgrade to VCS 3.0. The UNIX-based version is scheduled to be available on Oct. 15, 1996. The Workview Office version (Windows-based) will be available later in Q4, 1996. Viewlogic Systems, Inc. is a worldwide supplier of electronic design automation software. The company's design tools enable electrical engineers to design state-of-the-art electronic products more efficiently, while reducing both development costs and time to market. The company offers software for both UNIX- and Windows-based computing platforms, along with a broad range of support services support services Psychology Non-health care-related ancillary services–eg, transportation, financial aid, support groups, homemaker services, respite services, and other services . Viewlogic is the first Computer Aided Engineering (application) Computer Aided Engineering - (CAE) Use of computers to help with all phases of engineering design work. Like computer aided design, but also involving the conceptual and analytical design steps. (CAE) software company in the world to achieve registration to ISO (1) See ISO speed. (2) (International Organization for Standardization, Geneva, Switzerland, www.iso.ch) An organization that sets international standards, founded in 1946. The U.S. member body is ANSI. 9001/TickIT, the most comprehensive of the ISO quality standards. For more company information, the Internet home page address for Viewlogic is http://www.viewlogic.com. Viewlogic press releases are also available through the Company's News on Demand fax service by calling 800/448-8533. -0- NOTE TO EDITORS: All trademarks and registered trademarks are the property of their respective owners. CONTACT: Wilson McHenry Company Michele Clarke, 415/638-3400 mclarke@wmc.com OR Viewlogic Systems Inc. Karen Wills, 508/480-0881 kwills@viewlogic.com |
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