Chipmakers' Use of Novellus' MOER Process Exceeds One Million Wafers Per Month.SAN JOSE San Jose, city, United States San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850. , Calif.--(BUSINESS WIRE)--March 3, 1999-- CMP-enabling technology helps prevent yield-killing tungsten contamination while maximizing useable wafer surface area Novellus Systems Novellus Systems develops, manufactures, sells, and services semiconductor equipment used in the fabrication of integrated circuits. It is a leading supplier of chemical vapor deposition (CVD), physical vapor deposition (PVD), electrochemical deposition (ECD), chemical mechanical Inc. (Nasdaq:NVLS NVLS Novellus Systems (stock symbol) ), the productivity and innovation leader in thin film deposition Placing thin films of material onto metal, ceramic or semiconductor substrates. See sputtering. technologies for the global semiconductor industry, today announced that its patented minimal overlap exclusion ring (MOER MOER Making Our Environment Right (Boston MA) ) process has become a dominant tungsten deposition technology with production usage exceeding one million wafers per month. Designed to prevent tungsten deposition on the wafer's edge and backside, where it cannot be removed during chemical mechanical polishing (CMP CMP (cytidine monophosphate): see cytosine. (1) (CMP Media LLC, Manhasset, NY, www.cmp.com) Part of United Business Media, CMP is a leading integrated media company that offers a wide variety of publications and services in the information ), the MOER process is an enabling technology for tungsten use in semiconductor manufacturing, both minimizing yield-killing defects caused by tungsten contamination and maximizing the useable surface area on the wafer. Tungsten deposition is one of the critical technologies enabling the use of multiple metal layers and high aspect ratios required to produce advanced integrated circuits Integrated circuits Miniature electronic circuits produced within and upon a single semiconductor crystal, usually silicon. Integrated circuits range in complexity from simple logic circuits and amplifiers, about 1/20 in. (1. (ICs) with smaller geometries, greater density and higher speeds. At the same time, it also poses a unique challenge for semiconductor manufacturers. Maximizing the useable surface of a wafer increases the die-yield per wafer. If the wafer is fully covered with tungsten during deposition, however, tungsten from the wafer's beveled bev·el n. 1. The angle or inclination of a line or surface that meets another at any angle but 90°. 2. Two rules joined together as adjustable arms used to measure or draw angles of any size or to fix a surface at an angle. edge may not be removed during the CMP process and may peel off during subsequent process steps, causing yield-killing contamination. On the other hand, excluding the outer edge of the wafer from tungsten deposition reduces the useable area on the wafer, also reducing the yield per wafer. Not only does Novellus' MOER process resolve these problems with guaranteed deposition uniformity up to 194 mm, but it is also the sole exclusion ring solution currently available that does not directly contact the wafer. As a result, the MOER process eliminates the potential for scratches or particle contamination posed by other approaches. "There are only two ways of increasing yield," said John A. Chenault, executive vice president of Novellus' Metals Business Group. "You can either eliminate defects or print more die on the wafer. Our MOER process is an extremely elegant solution that allows our customers to achieve both of these approaches in a single process. Novellus is the only company to offer this technology in a production-worthy system. As a result, our MOER process is used in nearly every major semiconductor fab See fab. in the world using CMP to produce their most advanced devices." The MOER process is available with both Novellus' Concept One(tm) Tungsten and Concept Two(tm) ALTUS(tm) deposition systems. A 300 mm version of the MOER process, released in third quarter of 1998, is currently in pilot production. Its non-contact design prevents wafer bevel bevel, n the inclination that one surface makes with another when not at right angles; in cavity preparation, a cut that produces an angle of more than 90° with a cavity wall. and backside deposition by creating a gas diffusion barrier between the exclusion ring and the wafer. This optimized backside gas flow prevents deposition on the bevel and results in highly uniform film deposition with full tungsten thickness to the very edge of the wafer, maximizing the number of functioning die per wafer that can be produced. According to Dataquest, the blanket tungsten deposition market is estimated to have been $217 million in 1998. According to Novellus, since the introduction of the MOER process in 1994, the company's share in the rapidly expanding CMP-compatible tungsten market has grown to over 80 percent. About Novellus Systems Novellus Systems Inc. manufactures, markets and services advanced automated wafer fabrication systems for the deposition of thin films. Novellus deposition systems are designed for high-volume production of advanced, leading-edge semiconductors at the lowest overall cost. Headquartered in San Jose, with subsidiaries in the United Kingdom, France, Germany, the Netherlands, China, Japan, Korea, Singapore and Taiwan, Novellus is a publicly traded company publicly traded company A company whose shares of common stock are held by the public and are available for purchase by investors. The shares of publicly traded firms are bought and sold on the organized exchanges or in the over-the-counter market. on the Nasdaq stock exchange (Nasdaq:NVLS). Additional information about the company is available on Novellus' home page on the World Wide Web, located at http://www.novellus.com |
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