ChipWrights Delivers Industry's First Visual Signal Processor; First of a Programmable RISC/DSP-based Family Optimized for Broad Range of Imaging and Video Applications.Business/Technology Editors Embedded Processor Forum 2002 SAN JOSE, Calif.--(BUSINESS WIRE)--April 30, 2002 Embedded Processor Forum ChipWrights, Inc., a leader in digital signal processing See DSP. Digital Signal Processing - (DSP) Computer manipulation of analog signals (commonly sound or image) which have been converted to digital form (sampled). (DSP) technology for mobile imaging applications, today introduced the CW4011 device - the first member of its new visual signal processor (ViSP) family. This highly scalable, embedded processor family represents a new approach to image and video processing. It is characterized by a patented microprocessor core comprising a RISC processor with a highly integrated, scalable array of DSP vector processing units. This family of code compatible processors is optimized for highly efficient, low transistor count implementations that will support applications ranging from very cost-sensitive (such as web-, cell phone-, and PDA-based cameras, digital still and video cameras) to very high-performance (such as video transcoders, photo kiosks, and digital color copiers). The first member of this family, the CW4011 ViSP, is the first fully C programmable system-on-a-chip (SoC) device that offers real time video, main level, main profile (MP@ML MP@ML Main Profile @ Main Level ) MPEG (Moving Pictures Experts Group) An ISO/ITU standard for compressing digital video. Pronounced "em-peg," it is the universal standard for digital terrestrial, cable and satellite TV, DVDs and digital video recorders (DVRs). 2 encoding at cost and power levels suitable for battery operated, portable digital image capture devices. It offers designers a powerful, single programming target, accelerating development of differentiated, next-generation portable digital imaging and video devices at a lower overall system cost. According to Tom Starnes, Gartner/Dataquest analyst, "A new company's best strategy for winning a socket from an established DSP architecture is to deliver hardware specially designed for the task at hand, which performs significantly faster, for less money, on less power, and gets the customer to market quicker." The CW4011's powerful CWv8 processor core includes a vector array of fully pipelined DSP units that support 32 multiply accumulates per cycle. At over 4000MIPS (Million Instructions Per Second) The execution speed of a computer. For example, .5 MIPS is 500,000 instructions per second; 100 MIPS is a hundred million instructions per second. , it is twice as fast as similar solutions based on general-purpose DSP architectures. And at 0.10mW/MIPS, it supports the low power requirements for the next generation of battery-powered devices. The CW4011 ViSP is available with a full software development kit that includes an optimizing C compiler, a cycle accurate software simulator, a visual (JTAG (Joint Test Action Group) An IEEE standard for boundary scan technology. See scan technology. JTAG - Joint Test Action Group ) debugger and assembler, and a performance profiler - all based on the popular Metrowerks(TM) CodeWarrior(TM) Integrated Development Environment See IDE. integrated development environment - interactive development environment (IDE). The development software supports Microsoft Windows(TM) and Linux-based platforms. "Developers are ready for a new approach to image processing," said Brian Fitzgerald, President and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. , ChipWrights, Inc. "The ChipWrights ViSP family of devices will enable fully programmable image and video processing solutions ranging from cost sensitive consumer applications to the most demanding commercial applications. It frees designers from the restrictions imposed by fixed-function, multiprocessor SoCs commonly used in consumer applications and offers significantly better cost- and power-performance compared to the Very Long Instruction Word architecture-based devices commonly used in commercial applications. In this business climate, success goes to those who can deliver; the CW4011 ViSP is available now, and our customers can ramp to volume production this year." The CW4011 ViSP enables DVD-quality video capture and playback in battery powered, portable devices. It is the only device in its class - a single processor - that can achieve real time video, (MP@ML) MPEG2 encoding, at cost and power points suitable for digital image capture devices. Competitive solutions that can achieve this performance level are both cost- and power-prohibitive or must use multiple processing cores and fixed function computational accelerators that limit flexibility and end-product differentiation. The CW4011 ViSP is fully programmable and can support real time MPEG2 and MPEG4 video encoding in a completely flexible manner. It supports real time video decode of VGA MPEG4 streams at 30 frames per second and MPEG2 MP@ML. The CW4011 ViSP has enough performance to support simultaneous real time CIF (1) (Common Intermediate Format) A standard video format used in videoconferencing. CIF formats are defined by their resolution, and standards both above and below the original resolution have been established. The original CIF is also known as Full CIF (FCIF). MPEG4 (I+P frames) encode and decode for high quality, low bit rate videophone applications. The CW4011 ViSP supports today's digital still camera (DSC) standards, offering unprecedented performance for a C programmable device. It supports a high quality, complete DSC pipeline for CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes. and CCD sensors, including JPEG JPEG in full Joint Photographic Experts Group Standard computer file format for storing graphic images in a compressed form for general use. JPEG images are compressed using a mathematical algorithm. compression, running at 12 megapixels/sec. This is over twice the performance of competitive solutions based on fixed function accelerators and general purpose DSPs. This level of performance enables continuous, unlimited burst shooting in three megapixel digital cameras at over four frames per second, with only 16MB SDRAM (Synchronous DRAM) A type of dynamic RAM (DRAM) memory chip that has been widely used since the late 1990s. SDRAM chips eliminated wait states by dividing the chip into two cell blocks and interleaving data between them. , or capture of full motion, 30 frame per second, JPEG images at VGA resolution. In standalone operation, the CW4011 ViSP supports JPEG compression at over 20 megapixels/sec. Because the ChipWrights CW4011 ViSP is the industry's first application specific DSP optimized for image and video processing, it supports emerging DSC standards such as JPEG2000. JPEG2000 is based on wavelet technology, which enables better compression without image degradation. Ultra-low bit rate digital communications applications will benefit from support for real time CIF motion JPEG2000 encoding. Low bit rate image and video coding allow wireless operators to increase the utilization of wireless channels and lower the cost of image- and video-based phone calls. The CW4011 ViSP is built on a 32-bit fixed-point processor core comprising an innovative single instruction multiple data (SIMD (Single Instruction stream Multiple Data stream) A computer that performs one operation on multiple sets of data. It is typically used to add or multiply eight or more sets of numbers at the same time for multimedia encoding and rendering as well as scientific )/Vector DSP and a RISC RISC in full Reduced Instruction Set Computing Computer architecture that uses a limited number of instructions. RISC became popular in microprocessors in the 1980s. microprocessor. It has traditional vector features such as strided and scatter-gather memory accesses, conditional operations, code-independence from the number of datapaths and uniform memory. It enhances vector processing with features such as end-of-array handling, run-time variable numbers of datapaths, table operations, and unlimited conditional nesting. The CW4011 ViSP supports a 16/32-bit SDRAM interface and a 16-bit host/peripheral interface. It also includes separate 16-bit video in and video out ports that support simultaneous data transfers at 100MB/sec. A 3-channel DMA controller, 3-wire SPI serial interface, UART (Universal Asynchronous Receiver Transmitter) The electronic circuit that makes up the serial port. Also known as "universal serial asynchronous receiver transmitter" (USART), it converts parallel bytes from the CPU into serial bits for transmission, and vice , JTAG/SCAN unit, 16 GPIO GPIO General Purpose Input/Output GPIO General Purpose Input Output , and 3 timers round out the I/O and support functions. The CW4011 ViSP is designed to be the main system controller and is supported by the Accelerated Technology Nucleus PLUS RTOS (1) (RealTime Operating System) An operating system designed for use in a real time computer system. See real time system, embedded system, process control and OS-9. . It can also operate as a coprocessor and connects gluelessly to many 8/16-bit microcontrollers. Multiple CW4011s can be chained together through the high-speed video ports and scale to form a distributed multiprocessor system for video transcoding, digital cinema processing, and other high performance video and image processing applications. Product Pricing and Availability The CW4011 ViSP will be offered at 200, 233, and 266MHz. Samples are available today and production volumes will be available in Q3 2002. The 208-pin device is available in a plastic quad flat pack (PQFP (Plastic Quad Flat Package) Refers to many varieties of QFP chip packages, which are molded in plastic. See QFP. ) or ball grid array “BGA” redirects here. For other uses, see BGA (disambiguation). A ball grid array (BGA) is a type of surface-mount packaging used for integrated circuits. (BGA) package, with pricing for the 200MHz part at less than $20 each in quantities of 10,000 units. The CodeWarrior(TM) Software Development Kit for Windows 2000 is available now with pricing as follows: the first copy is $4,495; additional copies are $2,495 each. The CW4011 Evaluation Kit, which connects to a host PC using IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields. 1394, is available for $4,495.00. About ChipWrights ChipWrights is a fabless semiconductor company A fabless semiconductor company specializes in the design and sale of hardware devices implemented on semiconductor chips. It achieves an advantage by outsourcing the fabrication of the devices to a specialized semiconductor manufacturer called a semiconductor foundry or "fab. specializing in the design, development, and marketing of a new class of digital signal processing-based devices called visual signal processors (ViSPs). ChipWrights developed the industry's first ViSP -- a fully programmable, low cost, low power, and very high performance DSP/RISC microprocessor -- for the diverse, fast-growing mobile digital imaging and video markets. Specific application areas include real-time image capture/presentation and image transmission/network media infrastructure. ChipWrights provides a complete software development tool suite and hardware reference designs. Headquartered in the United States, the company has offices in Newton, MA and Tokyo, Japan. Additional corporate and technical information is available at www.chipwrights.com. Editor's Note: For sales inquiries, please call sales at 617-928-0100 or email: sales@chipwrights.com. ChipWrights, 2150 Washington Street, Newton, MA 02462. |
|
||||||||||||||||
Printer friendly
Cite/link
Email
Feedback
Reader Opinion