Chip Scale Package -- CSP -- Reduces Board Space for DDR or SSTL Terminations; CAMD's Thin Film Resistor Termination Array in CSP Format.Business Editors/High-Tech Writers MILPITAS, Calif.--(BUSINESS WIRE)--July 25, 2000 California Micro Devices (Nasdaq:CAMD CAMD Center for Advanced Microstructures and Devices CAMD Clean Air Markets Division (US EPA) CAMD Computer-Assisted Molecular Design CAMD Chemical Agent and Munitions Disposal CAMD Carl Asmis Memorial Dressage Association ) In Brief... -- 16 high frequency series/parallel termination channels -- Integrates 32 resistors in a single device -- CSP (1) (Certified Systems Professional) An earlier award for successful completion of an ICCP examination in systems development. See ICCP. (2) (Commerce Service P format occupies considerably less space than SOT or MSOP MSOP Mini Small Outline Package MSOP Mini Series of Poker MSOP Minnesota Sex Offender Program MSOP Management Stock Option Plan MSOP Memphis School of Preaching (Memphis, TN) MSOP Minimum Sum-Of-Products packaging -- Absolute tolerance of +/-1.0% over temperature California Micro Devices Corporation (CAMD) (Nasdaq:CAMD) announced today the CSPDDR100, a Double Data Rate (DDR (Double Data Rate) Refers to an SDRAM memory chip that increases performance by doubling the effective data rate of the frontside bus. For more details, see SDRAM. DDR - Double Data Rate Random Access Memory ) or Series Stub A small software routine placed into a program that provides a common function. Stubs are used for a variety of purposes. For example, a stub might be installed in a client machine, and a counterpart installed in a server, where both are required to resolve some protocol, remote procedure Terminated Logic (SSTL SSTL Surrey Satellite Technology Ltd SSTL Stub Series Terminated Logic SSTL Site Specific Target Level SSTL Solid State Track Link ) termination array for use in computers, network infrastructure equipment such as servers, routers, switches and graphics accelerator cards. This device provides an integrated solution in Chip Sale Package (CSP) format for DDR and SSTL bus terminations where both series and parallel termination resistors are required. The device combines 32 resistors for a total of 16 termination channels and is currently the highest level of integration available for these applications. As signal speeds in systems increase, engineers have to pay greater attention to the specifics of how transmission lines are terminated to maintain signal integrity, and the effect of the high speed signals on the rest of the system in which they are incorporated. This requires higher performance components, tighter tolerances and matching, and more attention to the layout and signal flow in the system. This new component meets those requirements for the emerging DDR RAMs, as well as other systems using SSTL termination structures. Built using state-of-the-art thin film technology, the resistors have excellent high frequency performance (greater than 3GHz). This is far superior to traditional discrete resistors that have performance issues with harmonic frequencies in excess of 1GHz. To provide better impedance matching of the interconnections, and thus improved signal integrity on the transmission line, the resistors are trimmed to an absolute tolerance of +/-1% over temperature. Implementing the CSPDDR100 in a high-speed memory system will reduce ringing on the transmission lines, reduce crosstalk between lines, increase noise margins, and minimize EMI/RFI emission problems. Also, the chip scale technology provides a parasitic inductance, which is lower than conventional discrete resistors which, in turn, improves high-speed performance. The CSP format is beneficial both in applications where very high performance is needed, and where board space is at a premium. It has a very small footprint that is only 5.79mm by 2.44mm for the full 32 resistors. This represents space savings of at least 485% over a discrete component solution. It also allows attachment to laminate printed circuit boards (PCBs), such as those made with FR-4, without using costly underfill (glue) to secure the devices to the board. The design layout of the PCB PCB: see polychlorinated biphenyl. PCB in full polychlorinated biphenyl Any of a class of highly stable organic compounds prepared by the reaction of chlorine with biphenyl, a two-ring compound. is simple since the bump pattern (4x9) allows easy flow through routing on the PCB. There is no need to change manufacturing equipment since existing surface mount technology equipment can be used to assemble these devices onto PCBs. According to Ashok Chalaka, Vice President of IPD IPD Institut für Programmstrukturen und Datenorganisation IPD Investment Property Databank (UK) IPD Integrated Product Development IPD Intellectual Property Department IPD Invasive Pneumococcal Disease IPD Implicit Price Deflator Marketing, "This chip was originally designed by CAMD in conjunction with the hardware engineers at 3Dfx Interactive, Inc. (Nasdaq:TDFX TDFX Testis-Determining Factor, X-Chromosomal ). With the growing need for higher performance graphics accelerators that are designed to operate at speeds in excess of 500MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. , proper terminations have become increasingly critical." "We chose CAMD's CSPDDR100 since it offers the highest density among all passives by replacing 320 discrete resistors with 10 chips. Moreover, with the Chip Scale Packaging (hardware) Chip Scale Packaging - (CSP) A type of surface mount integrated circuit packaging that provides pre-speed-sorted, pre-tested and pre-packaged die without requiring special testing. An example is Motorola's Micro SMT packaging. , performance is ideal at the high frequencies. This product enables 3Dfx to offer the most competitive and highest performance graphics card in the industry," said Brian Schieck, Sr. Systems Engineer at 3Dfx. Pricing for the CSPDDR100 in 100K quantities is $0.41. Samples are available now and production lead-time is 6-8 weeks ARO. Headquartered in Milpitas, California, California Micro Devices designs, manufactures and markets integrated thin film, silicon-based termination, filtering, and active electronic circuitry. Built in ISO (1) See ISO speed. (2) (International Organization for Standardization, Geneva, Switzerland, www.iso.ch) An organization that sets international standards, founded in 1946. The U.S. member body is ANSI. 9000-registered quality system environments, California Micro Devices' products target the requirements of computer, networking, and communication-based customers for smaller, high density devices that operate at high frequencies with superior performance and functionality. |
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