Chip Express Unveils 0.35 Micron Fast-Turn Gate Array Families With Advanced Technology Supporting Up to 1.5 Million Gates.SANTA CLARA, Calif.--(BUSINESS WIRE)--March 23, 1998-- The CX3000, 0.35 Micron CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes. Technology Features One-Day Turnaround for High Performance Gate Arrays With Embedded Memory, Mixed Voltage and Low Power Chip Express Corp. today announced the CX3000, 0.35 micron CMOS technology for fast-turn, high performance and high-density gate array families. The CX3000 technology supports gate array production of up to 1.5 million logic gates plus up to 416K bits of embedded memory. Utilizing three or four-layer metal interconnect structure, the CX3000 technology features high density (12,000-13,000 gates per mm squared), about 20% greater density than most comparable standard cell solutions. The capability to increase the density is extremely important for high volume production so that a required gate count can be implemented on a smaller device and thus result in a significant cost advantage. The silicon for both CX3000 technology families is provided by Chartered Semiconductor Manufacturing Chartered Semiconductor Manufacturing SGX: C27 NASDAQ: CHRT (abbreviated CSM) is the world's fourth largest dedicated independent semiconductor foundry, with its headquarters and main operations located in the Woodlands Industrial Park, Kranji Singapore. (Singapore), the Chip Express' world class foundry partner. The CX3000 technology families offer extremely low power consumption of 0.1 micron W/MHz/gate power consumption (significantly better than most 0.35 micron offerings). Moreover, SRAM See static RAM. SRAM - static random-access memory speeds of 290MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. at 3.3 volt were accomplished, with as quick as one day turnaround time available for prototypes, a couple of weeks for low volume and two month lead-time for high volume production. Furthermore, the CX3000 technology features 3.3 volt, 5 volt or mixed voltage I/Os, and 5 volt I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output. I/O - Input/Output tolerance at 3.3 volt core. A unique feature enables powering the device with a single 5 volt supply. Currently, the CX3000 technology comprises of two families: the CX3001 for prototyping and low volume production, and the CX3002 for high volume production. The density for these families ranges from 14K to 1.5 million logic gates plus 8K to 416K bits of embedded configurable SRAM or ROM. Platform capability ranges from 100 up to 608 I/O pads. A unique dual-oxide process was developed to enable providing 5 volt I/O tolerance and mixed 3.3 volt and 5 volt with 0.35 micron geometry. A variety of other I/O features are available, including 3.3 volt PCI (1) (Payment Card Industry) See PCI DSS. (2) (Peripheral Component Interconnect) The most widely used I/O bus (peripheral bus). compliance at 66MHz, GTL GTL - Gunning Transceiver Logic and USB USB in full Universal Serial Bus Type of serial bus that allows peripheral devices (disks, modems, printers, digitizers, data gloves, etc.) to be easily connected to a computer. support. In addition, the CX3001 and CX3002 family members include up to 4 embedded APLLs that minimize clock insertion delays and allow clock synthesis. "In 0.35 micron process, interconnections are the dominant factor in the manufacturing process, making traditional gate arrays an ineffective solution. This led most gate array vendors to desert the 0.35 micron gate arrays in favor of standard cell arrays. Chip Express, with its unique approach and technology, reinvented the gate array since it uses a generic structure including interconnections for prototyping and low volume production. Therefore, Chip Express could offer very effective gate array product line in 0.35 micron process with high performance, low power, high density, low cost volume production with very rapid turnaround time, flexible manufacturing for low volume and low NRE (Non-Recurring Engineering) Refers to the cost of creating a new product, which is paid up front. Contrast with "production cost," which is ongoing and based on the quantity of material produced. costs," said Zvi Or-Bach, Chip Express' president and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. . With one set of tooling inputs from the designer, Chip Express migrates the design through development to the optimum production method for the required volume and turn time. This fast and smooth migration from prototyping to production, encompassing easy attained multiple iterations, eliminates diversion of user's effort and additional costs associated with establishing multiple tooling interfaces or conversions for ramping ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. volumes. The CX3001 LPGA LPGA abbr. Ladies Professional Golf Association (Laser Programmable Gate Array) fast-turn prototypes are available in one-day delivery using Chip Express' unique QuICk(R) laser micro-machining system that employs a disconnect methodology to remove all unneeded metal interconnect links from a generic, fully connected device, leaving only the desired ASIC interconnect pattern. For low volume of CX3001 devices, the proprietary OneMask(R) process technology is used in-house, to provide lead-time as short as a couple of weeks. Higher volumes, typically required for pilot production, are also available at further reduced cost in one-month lead-time with the TwoMask(TM) process technology. The CX3002 devices, designed for cost-competitive high volume production, are offered in only two-month lead-time using HardArray(TM) process technology for increased density of almost three folds greater than a comparable prototype device. The CX3000 technology families support full-scan ATPG ATPG Automatic Test Pattern Generation ATPG Automatic Test Program Generator , without any speed or density penalties, using an extension of the previously proven test support package for the CX2000, 0.6 micron technology. By minimizing test efforts, the CX3000 technology families allow to accelerate time to market. A wide range of popular packaging types are available for the CX3000 technology families, including PQFP (Plastic Quad Flat Package) Refers to many varieties of QFP chip packages, which are molded in plastic. See QFP. - up to 240 pins, PGA (1) (Professional Graphics Adapter) An early IBM PC display standard for 3D processing with 640x480x256 resolution. It was not widely used. (2) (Programmable Gate Array) See gate array and FPGA. - up to 391 pins and BGA (Ball Grid Array) A popular surface mount chip package that uses a grid of solder balls as its connectors. Available in plastic and ceramic varieties, BGA is noted for its compact size, high lead count and low inductance, which allows lower voltages to be used. - up to 553 pins. Pricing and Availability The laser system has already proven the capability to customize 0.35 micron devices, generating working silicon. The OneMask(R) process has yielded similar results. Some previously established customer designs are now converted to the CX3000 technology families. New designs with the 0.35 micron technology process will begin within the next three weeks, and full production volume is expected to start in late Q2/early Q3 of 1998. A CX3001 family member with 500K logic gates plus 416K bits of memory in a typical package is priced at $127 per unit for 3000 devices order. Lead-time is 4 weeks. A CX3002 family member with 350K logic gates plus 96K bits memory is priced at $15 per unit for 100,000 devices order. Lead-time is 8-12 weeks. Design data is available for commercial, industrial and military temperature ranges in the CX3000 Cell Library Data Book. Synthesis support is available from the Synopsys Design Compiler Kit and Simulation libraries from the Cadence Verilog XL Design Kit, supplemented by application notes. -0- CHIP EXPRESS CORPORATION is the world leader in "Time-to-Market Solution(R)" for high-performance, high-density ASIC devices. Chip Express provides the industry's fastest-turn ASIC products, including a one day gate array prototyping service utilizing the QuICk(R) laser micro-machining system; one week flexible production utilizing its innovative OneMask(R) process to personalize a single wafer at a time; and a smooth transition to its TwoMask(TM)/HardArray(TM) technology for cost competitive high volume production in as short as one month. Chip Express is a privately held corporation Noun 1. privately held corporation - a corporation owned by a few people; shares have no public market close corporation, closed corporation, private corporation , founded in the United States in 1989. From its headquarters in Santa Clara, Chip Express services leading-edge computer, communications and military companies worldwide including Hewlett Packard, Intel, 3Com, Sun, Cisco Systems, Bay Networks, Lockheed Martin, Hughes Aircraft, and National Semiconductor. CONTACT: Chip Express Corp. Tsipi Landen, 408/235-7353 Marketing Communication Director tsipi@chipx.com Bob Pecotich, 408/235-7321 Product Marketing Manager bobp@chipx.com |
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