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Chip Designers Can Save Valuable Time with New Tanner Tools 12.2 for Analog and Mixed-Signal Design.


Performance Upgrade, New Features Speed Design-to-Chip Process and Make Tools Easier to Use

MONROVIA, Calif. -- Tanner The code name for the Xeon version of the Pentium III chip. See Xeon.  EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. , which provides cost-effective, easy-to-use, Windows[R]-based tools for analog and mixed-signal circuit design, today announced the immediate availability of Tanner Tools 12.2, the latest version of its integrated tool suite for schematic capture schematic capture - The process of entering the logical design of an electronic circuit into a CAE system by creating a schematic representation of components and interconnections. , simulation, physical layout and verification.

"Tanner Tools continues to add value and efficiency for analog and mixed-signal designers. Our latest performance enhancements and new features provide for a more tightly integrated and highly functional tools set that continues to evolve to meet the needs of our customers," noted Dr. Massimo Sivilotti, chief scientist, Tanner EDA.

Tanner Tools 12.2 New Features and Speed Enhancements

Tanner Tools 12.2 includes new features and updates for S-Edit, T-Spice, L-Edit and HiPer Verify. S-Edit provides schematic capture, which offers netlist input and output and tight integration with analog simulation, as well as the ability to perform Schematic A graphical representation of a system. It often refers to electronic circuits on a printed circuit board or in an integrated circuit (chip). See logic gate and HDL.  Driven Layout. The latest S-Edit enhancements include:

* Faster EDIF EDIF - Electronic Design Interchange Format.

Not a programming language, but a format to simplify data transfer between CAD/CAE systems. LISP-like syntax. See also Berkeley EDIF200.

E-mail: <edif-support@cs.man.ac.uk> ftp://edif.cs.man.ac.uk/pub/edif.
 import and export, SPICE export and design load and save

* Ability to import and export Cadence-compatible EDIF files

* Callback An authentication technique that calls the sender back. After connection is made, the receiving side breaks the connection and calls the sender to ensure that the logon was made from the authorized computer. Callback prevents a stolen ID and password from being used on a different machine.  functions for properties

* Print preview A software function that displays on screen the way a document will print on paper. Print preview eliminates wasting paper as corrections are made before the document is printed. In addition, network printers are not always close by and easily accessible.  feature and optimized black-and-white printing performance

T-Spice circuit simulation, which currently includes HSPICE/PSpice compatibility and support for the latest industry models, now features faster performance as well as improved operating point convergence using pseudo-transient analysis and new homotopies.

L-Edit, Tanner's physical layout editor, now offers:

* Layer palette that displays layer names and icons

* Integrated layer manager that allows users to define layers as locked or selectable

* Capability to automatically convert layouts to T-cell code

* DevGen feature, which creates T-cells for common devices (transistors, resistors, capacitors) with L-Edit Schematic Driven Layout (SDL (Specification and Description Language) A modeling language used to describe real time systems. It is widely used to model state machines in the telecommunications, aviation, automotive and medical industries. )

* Expanded support for small feature sizes that are more common in new designs

* Ability to undo auto-placement of vias, contacts and guard rings

HiPer Verify, which offers foundry-compatible, hierarchical design rule checking, now saves valuable design time by running checks from 2 to 10 times faster.

New Program Smoothes Transition to Tanner

Tanner also announced that it will extend its SmoothSwitch offer to include the new Tanner Tools 12.2. SmoothSwitch offers significant discounts and a support program to help users of ICED tools make the transition to Tanner EDA. For more information on the SmoothSwitch offer, go to www.tannereda.com/smoothswitch.

Availability and Pricing

Tanner Tools 12.2 is available now. Pricing varies depending on geography and licensing. For pricing and licensing information, contact Tanner EDA at sales@tanner.com or call 1-877-325-2223 (inside U.S.) or 1-626-471-9701 (outside U.S.).

About Tanner EDA

Tanner EDA is a leading provider of easy-to-use, PC-based electronic design automation (EDA) software solutions for the design, layout and verification of analog/mixed signal ICs and MEMS (MicroElectroMechanical Systems) Tiny mechanical devices that are built onto semiconductor chips and are measured in micrometers. In the research labs since the 1980s, MEMS devices began to materialize as commercial products in the mid-1990s. . Its solutions help speed designs from concept to silicon and are used by thousands of companies to develop devices cost-effectively in next-generation wireless, consumer electronics, imaging, power management, biomedical bi·o·med·i·cal
adj.
1. Of or relating to biomedicine.

2. Of, relating to, or involving biological, medical, and physical sciences.
, automotive and RF market segments. Founded in 1988, Tanner EDA is a division of privately held Tanner Research, Inc.

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COPYRIGHT 2007 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2007, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Date:Jan 8, 2007
Words:514
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