Chartered Semiconductor and TestChip Technologies Prove World's First Fully Compiled Technology Development SRAM; Enables Acceleration of Process Development and Yield Ramp.

SAN JOSE, Calif. and DALLAS--(BUSINESS WIRE)--Oct. 14, 1999--

Chartered Semiconductor and TestChip Technologies, Inc. today revealed positive results of TestChip's TDSRAM(TM) (Technology Development SRAM). Chartered, the first TDSRAM customer, proved functionality and utility of the test vehicle in September.

TDSRAM Accelerates SRAM Bitcell and Process Development Methods

"We have spoken with foundries, integrated device manufacturers and IP design firms who agree that their SRAM design resources are best invested in revenue-generating designs. Multi-tasking these designers with development vehicle responsibility often causes schedule delays due to insufficient focus." said Mark Harward, TestChip's President. "The fully compiled nature of TestChip's TDSRAM in combination with our complete test and analysis service offering enables customers to place a sophisticated product-like circuit on their initial TD chips without paying the usual schedule penalty. A bitcell development engineer gets excited when you tell them it's possible to put different pitch bitcells in each TDSRAM sub-array."

Chartered is pleased with the effectiveness of the test device, "The technology development TDSRAM provided by TestChip Technologies has provided great value in our technology development acceleration efforts. Its highly testable design and many diagnostic features make this vehicle an excellent tool for rapid debug and yield ramp of new process technologies," said John Martin, Vice President of Technology Development for Chartered Semiconductor Manufacturing. Chartered plans to utilize TDSRAM on other process nodes for yield enhancement activities and advanced process development.

Several additional TDSRAM designs for advanced technology nodes are in process at TestChip. Harward described the compelling reason for this development work. "It's simple economics. The enormous cost of advanced semiconductor technology development forces our customers to seek any edge they can get in time-to-volume. Our team challenged the current model for bitcell and process test vehicle development and came up with a significantly faster method. We can now quickly provide our customers highly testable SRAMs specifically designed for a very wide variety of characterization purposes. This is new capability for process integration and bitcell development engineers." The TDSRAM architecture is being extended to meet the needs of non-volatile memory and CMOS imaging technology development.

TDSRAM Product and Service Offering Details

TDSRAM is offered with a full service complement for technology acceleration. This includes bitcell design consultation, test program generation, wafer test, on-site engineering support during first silicon characterization, assistance with early data analysis and failure analysis, and coordination of process qualification reliability stresses. TDSRAM configurations range from 1MB to 16MB and include a full suite of parametric evaluation/characterization modules. Pricing starts at $150K.

About TestChip Technologies, Inc.

TestChip Technologies, Inc. is the industry leader in providing testchip designs and services to semiconductor designers, manufacturers, and fabrication equipment vendors. The corporation focuses on accelerating semiconductor technology development for their worldwide customer base. TestChip is privately held with headquarters in Dallas, Texas and branch offices in Austin, TX. For more information, visit www.testchip.com or contact Brenda Stoner at 214/348-5875 ext. 207.