Chameleon Systems Introduces the Industry's First Reconfigurable Communications Processor Family.

Business Editors/High-Tech Writers

SUNNYVALE, Calif.--(BUSINESS WIRE)--May 22, 2000

Integrated system platform approach simplifies communication

system design while lowering cost/channel

Chameleon Systems, Inc. today announced a breakthrough in performance and flexibility with the introduction of their high-bandwidth reconfigurable communications processor (RCP). Powered by the company's proprietary eConfigurable(tm) technology, Chameleon's CS2000 family of communications processors provides a complete and verified reconfigurable platform that delivers 24,000 16-bit MOPS (million operations per second), 3,000 16-bit MMACS (million multiply-accumulates per second), and 50 channels of cdma2000 chip-rate processing.

"One of the foremost challenges facing system designers in the networking and communications industries today is the need to build ever-increasing performance into their systems while maintaining sufficient flexibility to cope with the chaotic world of evolving standards, protocols, and algorithms," said Chuck Fox, president and CEO of Chameleon Systems. "Traditional programmable solutions such as FPGAs and DSPs lack the performance required in high-bandwidth applications. And fixed-function solutions like ASICs and ASSPs incur unacceptable limits on flexibility," Fox explained.

Chameleon has addressed this dilemma with a communications processor that combines unmatched processing power with multi-protocol, multi-application flexibility. "We deliver ten times the price/performance of today's highest performing DSPs," said Fox. "More importantly, our customers can implement their own algorithms, while substantially decreasing the cost/channel of their system. For example, our first product -- the CS2112 -- supports 50 channels of cdma2000 chip-rate processing. That nearly doubles the number of channels presently supported in single dedicated devices at a comparable cost, and yet it's completely flexible for field updates and multi-protocol applications."

The initial market for the CS2000 family is communication infrastructure. Applications include second- and third-generation wireless basestations, fixed-point wireless local loop (WLL), smart antennas, voice-over-IP (VoIP), secure communications, very high-bit-rate digital subscriber line (DSL), and the wide variety of communications applications that have traditionally used reprogrammable devices (such as DSPs and FPGAs). The CS2000 is uniquely suited to address the broad range of critical needs required by these markets: performance, flexibility, cost/channel, and time-to-market (TTM).

CS2000 Family Architecture

Each product in the CS2000 family has the same fundamental complement of functional blocks: a 32-bit RISC Processor (licensed from ARC Cores, UK), a full-featured memory controller, a PCI controller, and a reconfigurable processing fabric, all of which are interconnected through a high-speed system bus. Chameleon optimized the CS2000 architecture for implementing the full range of algorithms used in processing-intensive applications. Storage, datapath and control functions are precisely partitioned in the architecture to afford maximum performance and flexibility.

The reconfigurable processing fabric within the CS2000 family comprises an array of reconfigurable tiles used to implement the desired algorithms. Each tile contains seven 32-bit reconfigurable datapath units (DPUs), four blocks of local store memory (32 bits wide by 128 words deep), two 16x24-bit multipliers, and a control logic unit. The tiles are organized in slices, with three tiles per slice. Initially, Chameleon will offer products containing twelve, six and three tiles in order to offer cost-effective computing solutions for their customer target markets.

The on-chip PCI controller offers a high degree of integration with all of the other on-chip resources. The PCI controller itself is fully tested for PCI 2.2 compliance. This high-performance design provides an ideal host command port for use in larger system application environments.

The CS2000's memory controller offers a seamless memory interface to commonly desired storage devices. The controller provides a 64-bit wide port that operates at a full 125Mhz data rate, and supports SSRAM, SDRAM, and Flash EEPROM with up to a 1GByte-per-second transfer rate.

On-chip interconnection of the above CS2000 system components is provided by the CS2000 "RoadRunner" system bus. RoadRunner is a 128-bit wide, time division multiplexed bus that supports high utilization time and operates at the full system clock rate. To achieve high bus utilization and system efficiency, the chip includes a set of 16 distributed DMA engines to facilitate the flow of data in and out of the reconfigurable processing fabric.

The CS2000's high programmable I/O bandwidth of 2 GByte-per-second, a central performance feature that eliminates any bottlenecks in data delivery, maintains computational efficiency for the high-performance compute resources demanded in today's systems.

"Current high-speed processing architectures typically rely on centrally managed data cache and other hardware repositories that supply data to the on-chip compute resources," explained Chris Phillips, founder and CTO of Chameleon. "In addition, these architectures use a common bus structure to provide data flow between the numerous on-chip compute resources. The Chameleon architecture is unique in that it allows multiple independent data streams to have direct non-blocking access to and from the CS2000's vast resources. The CS2000's use of distributed memories and availability of 160 configurable I/O pins ensures that the customer's data bandwidth and memory access needs are met."

eConfigurable Technology

Chameleon's pioneering eConfigurable technology delivers instantaneous reconfigurability -- the entire reconfigurable processing fabric can be changed from one algorithm to another in a single clock cycle. This multiplies the capability of the device, increasing the number of voice/data/video channels per chip.

C~SIDE Development Tools

The Chameleon Systems Integrated Development Environment (C~SIDE) is a complete toolkit for designing, debugging and verifying RCP designs. C~SIDE utilizes standard C and HDL languages for design entry, and includes an optimized GNU C compiler for the 32-bit processor, an optimized HDL synthesizer for the reconfigurable processing fabric, and a full-chip simulator. C~SIDE simplifies simulation, debug and verification through a familiar C-style debugging environment and 100 percent visibility into all memories and registers throughout the RCP.

Chameleon's eConfigurable Basic I/O Services (eBIOS(TM)) resolves the traditional challenge of interfacing the 32-bit processor and the reconfigurable processing fabric. eBIOS provides a seamless interface between the embedded processor system and the fabric.

Pricing and Availability

The first product in the CS2000 family, the twelve-tile CS2112, will sample in Q3 of 2000. Pricing will begin at $295 each in 100 piece quantities. In 2H 2001, high-volume pricing is expected to decrease to the equivalent of less than $1.00 per cdma2000 chip-rate processing channel. The C~SIDE development tools will ship in Q3 of 2000 as well, priced at $25,000 for the complete software suite.

Analysts' Perspective

"If you're not designing reconfigurability into your next system-level integration, you will not be competitive," said Jerry Worchel, president of inSearch Research, an analyst firm based in Phoenix, Arizona. "With product life cycles at multiple months, standards and protocols in turmoil, and time-to-market pressures at an all-time high, products like Chameleon's Reconfigurable Communications Processor make absolute sense. It's time performance and flexibility were offered in the same package."

"Chameleon Systems is clearly plowing new ground with an instantaneously reconfigurable processor that is capable of performing high-end DSP functions that until now have been possible only through specialized ASICs and FPGAs," said Will Strauss, president of Forward Concepts (Tempe, AZ). "The CS2000 will get a lot of interest in hot new DSP markets, like 3G wireless base stations."

About Chameleon

Founded in 1997, Chameleon Systems, Inc. is a privately held fabless semiconductor company that designs, markets and sells reconfigurable communications processor (RCP) solutions for the communications electronics markets. Headquartered in Sunnyvale, California, the company has developed eConfigurable(TM) technology--an ideal solution for data-intensive, high-performance embedded telecom and datacom applications. The Chameleon RCP solution allows equipment vendors to create their own customized communications processors to adapt more quickly to new requirements and standards, reduce time-to-market, lower development costs and reduce risk.

Note to Editors: eConfigurable and eBIOS are trademarks of Chameleon Systems, Inc.

Note: A tilde appears in the "C Side Development Tools" section, between the "C" and "Side," which appear four times. Please check